ARM: Further break up condition code into NZ, C, V bits.

[gem5.git] / src / arch / arm / nativetrace.hh

diff --git a/src/arch/arm/nativetrace.hh b/src/arch/arm/nativetrace.hh
index 7467e337826239040cfa0d577e9785e165ae117f..d3f96f3ad4dc7cd14dd0fd9d46cf28c03e052385 100644 (file)
--- a/src/arch/arm/nativetrace.hh
+++ b/src/arch/arm/nativetrace.hh
@@ -62,15 +62,21 @@ class ArmNativeTrace : public NativeTrace
         STATE_R15,
         STATE_PC = STATE_R15,
         STATE_CPSR,
+        STATE_F0, STATE_F1, STATE_F2, STATE_F3, STATE_F4, STATE_F5, STATE_F6,
+        STATE_F7, STATE_F8, STATE_F9, STATE_F10, STATE_F11, STATE_F12,
+        STATE_F13, STATE_F14, STATE_F15, STATE_F16, STATE_F17, STATE_F18,
+        STATE_F19, STATE_F20, STATE_F21, STATE_F22, STATE_F23, STATE_F24,
+        STATE_F25, STATE_F26, STATE_F27, STATE_F28, STATE_F29, STATE_F30,
+        STATE_F31, STATE_FPSCR,
         STATE_NUMVALS
     };
 
   protected:
     struct ThreadState {
         bool changed[STATE_NUMVALS];
-        uint32_t state[2][STATE_NUMVALS];
-        uint32_t *newState;
-        uint32_t *oldState;
+        uint64_t state[2][STATE_NUMVALS];
+        uint64_t *newState;
+        uint64_t *oldState;
         int current;
         void update(NativeTrace *parent);
         void update(ThreadContext *tc);
@@ -107,6 +113,6 @@ class ArmNativeTrace : public NativeTrace
     void check(NativeTraceRecord *record);
 };
 
-} /* namespace Trace */
+} // namespace Trace
 
 #endif // __ARCH_ARM_NATIVETRACE_HH__