/*
- * Copyright (c) 2010 ARM Limited
+ * Copyright (c) 2010, 2012 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile,
ObjectFile::Arch _arch)
: LiveProcess(params, objFile), arch(_arch)
+{
+}
+
+ArmLiveProcess32::ArmLiveProcess32(LiveProcessParams *params,
+ ObjectFile *objFile, ObjectFile::Arch _arch)
+ : ArmLiveProcess(params, objFile, _arch)
{
stack_base = 0xbf000000L;
// Set up break point (Top of Heap)
brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
- brk_point = roundUp(brk_point, VMPageSize);
+ brk_point = roundUp(brk_point, PageBytes);
// Set up region for mmaps. For now, start at bottom of kuseg space.
mmap_start = mmap_end = 0x40000000L;
}
+ArmLiveProcess64::ArmLiveProcess64(LiveProcessParams *params,
+ ObjectFile *objFile, ObjectFile::Arch _arch)
+ : ArmLiveProcess(params, objFile, _arch)
+{
+ stack_base = 0x7fffff0000L;
+
+ // Set pointer for next thread stack. Reserve 8M for main stack.
+ next_thread_stack_base = stack_base - (8 * 1024 * 1024);
+
+ // Set up break point (Top of Heap)
+ brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
+ brk_point = roundUp(brk_point, PageBytes);
+
+ // Set up region for mmaps. For now, start at bottom of kuseg space.
+ mmap_start = mmap_end = 0x4000000000L;
+}
+
void
-ArmLiveProcess::initState()
+ArmLiveProcess32::initState()
{
LiveProcess::initState();
- argsInit(MachineBytes, VMPageSize);
+ argsInit<uint32_t>(PageBytes, INTREG_SP);
for (int i = 0; i < contextIds.size(); i++) {
ThreadContext * tc = system->getThreadContext(contextIds[i]);
CPACR cpacr = tc->readMiscReg(MISCREG_CPACR);
}
void
-ArmLiveProcess::argsInit(int intSize, int pageSize)
+ArmLiveProcess64::initState()
+{
+ LiveProcess::initState();
+ argsInit<uint64_t>(PageBytes, INTREG_SP0);
+ for (int i = 0; i < contextIds.size(); i++) {
+ ThreadContext * tc = system->getThreadContext(contextIds[i]);
+ CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
+ cpsr.mode = MODE_EL0T;
+ tc->setMiscReg(MISCREG_CPSR, cpsr);
+ CPACR cpacr = tc->readMiscReg(MISCREG_CPACR_EL1);
+ // Enable the floating point coprocessors.
+ cpacr.cp10 = 0x3;
+ cpacr.cp11 = 0x3;
+ tc->setMiscReg(MISCREG_CPACR_EL1, cpacr);
+ // Generically enable floating point support.
+ FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC);
+ fpexc.en = 1;
+ tc->setMiscReg(MISCREG_FPEXC, fpexc);
+ }
+}
+
+template <class IntType>
+void
+ArmLiveProcess::argsInit(int pageSize, IntRegIndex spIndex)
{
- typedef AuxVector<uint32_t> auxv_t;
+ int intSize = sizeof(IntType);
+
+ typedef AuxVector<IntType> auxv_t;
std::vector<auxv_t> auxv;
string filename;
//Auxilliary vectors are loaded only for elf formatted executables.
ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
if (elfObject) {
- uint32_t features =
- Arm_Swp |
- Arm_Half |
- Arm_Thumb |
-// Arm_26Bit |
- Arm_FastMult |
-// Arm_Fpa |
- Arm_Vfp |
- Arm_Edsp |
-// Arm_Java |
-// Arm_Iwmmxt |
-// Arm_Crunch |
- Arm_ThumbEE |
- Arm_Neon |
- Arm_Vfpv3 |
- Arm_Vfpv3d16 |
- 0;
-
- //Bits which describe the system hardware capabilities
- //XXX Figure out what these should be
- auxv.push_back(auxv_t(M5_AT_HWCAP, features));
+
+ if (objFile->getOpSys() == ObjectFile::Linux) {
+ IntType features =
+ Arm_Swp |
+ Arm_Half |
+ Arm_Thumb |
+// Arm_26Bit |
+ Arm_FastMult |
+// Arm_Fpa |
+ Arm_Vfp |
+ Arm_Edsp |
+// Arm_Java |
+// Arm_Iwmmxt |
+// Arm_Crunch |
+ Arm_ThumbEE |
+ Arm_Neon |
+ Arm_Vfpv3 |
+ Arm_Vfpv3d16 |
+ 0;
+
+ //Bits which describe the system hardware capabilities
+ //XXX Figure out what these should be
+ auxv.push_back(auxv_t(M5_AT_HWCAP, features));
+ //Frequency at which times() increments
+ auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64));
+ //Whether to enable "secure mode" in the executable
+ auxv.push_back(auxv_t(M5_AT_SECURE, 0));
+ // Pointer to 16 bytes of random data
+ auxv.push_back(auxv_t(M5_AT_RANDOM, 0));
+ //The filename of the program
+ auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
+ //The string "v71" -- ARM v7 architecture
+ auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
+ }
+
//The system page size
- auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::VMPageSize));
- //Frequency at which times() increments
- auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64));
+ auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::PageBytes));
// For statically linked executables, this is the virtual address of the
// program header tables if they appear in the executable image
auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
//to 0 for regular executables. It should be something else
//(not sure what) for dynamic libraries.
auxv.push_back(auxv_t(M5_AT_BASE, 0));
-
//XXX Figure out what this should be.
auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
//The entry point to the program
auxv.push_back(auxv_t(M5_AT_EUID, euid()));
auxv.push_back(auxv_t(M5_AT_GID, gid()));
auxv.push_back(auxv_t(M5_AT_EGID, egid()));
- //Whether to enable "secure mode" in the executable
- auxv.push_back(auxv_t(M5_AT_SECURE, 0));
-
- // Pointer to 16 bytes of random data
- auxv.push_back(auxv_t(M5_AT_RANDOM, 0));
-
- //The filename of the program
- auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
- //The string "v71" -- ARM v7 architecture
- auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
}
//Figure out how big the initial stack nedes to be
allocateMem(roundDown(stack_min, pageSize), roundUp(stack_size, pageSize));
// map out initial stack contents
- uint32_t sentry_base = stack_base - sentry_size;
- uint32_t aux_data_base = sentry_base - aux_data_size;
- uint32_t env_data_base = aux_data_base - env_data_size;
- uint32_t arg_data_base = env_data_base - arg_data_size;
- uint32_t platform_base = arg_data_base - platform_size;
- uint32_t aux_random_base = platform_base - aux_random_size;
- uint32_t auxv_array_base = aux_random_base - aux_array_size - aux_padding;
- uint32_t envp_array_base = auxv_array_base - envp_array_size;
- uint32_t argv_array_base = envp_array_base - argv_array_size;
- uint32_t argc_base = argv_array_base - argc_size;
+ IntType sentry_base = stack_base - sentry_size;
+ IntType aux_data_base = sentry_base - aux_data_size;
+ IntType env_data_base = aux_data_base - env_data_size;
+ IntType arg_data_base = env_data_base - arg_data_size;
+ IntType platform_base = arg_data_base - platform_size;
+ IntType aux_random_base = platform_base - aux_random_size;
+ IntType auxv_array_base = aux_random_base - aux_array_size - aux_padding;
+ IntType envp_array_base = auxv_array_base - envp_array_size;
+ IntType argv_array_base = envp_array_base - argv_array_size;
+ IntType argc_base = argv_array_base - argc_size;
DPRINTF(Stack, "The addresses of items on the initial stack:\n");
DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
// write contents to stack
// figure out argc
- uint32_t argc = argv.size();
- uint32_t guestArgc = ArmISA::htog(argc);
+ IntType argc = argv.size();
+ IntType guestArgc = ArmISA::htog(argc);
//Write out the sentry void *
- uint32_t sentry_NULL = 0;
- initVirtMem->writeBlob(sentry_base,
+ IntType sentry_NULL = 0;
+ initVirtMem.writeBlob(sentry_base,
(uint8_t*)&sentry_NULL, sentry_size);
//Fix up the aux vectors which point to other data
for (int i = auxv.size() - 1; i >= 0; i--) {
if (auxv[i].a_type == M5_AT_PLATFORM) {
auxv[i].a_val = platform_base;
- initVirtMem->writeString(platform_base, platform.c_str());
+ initVirtMem.writeString(platform_base, platform.c_str());
} else if (auxv[i].a_type == M5_AT_EXECFN) {
auxv[i].a_val = aux_data_base;
- initVirtMem->writeString(aux_data_base, filename.c_str());
+ initVirtMem.writeString(aux_data_base, filename.c_str());
} else if (auxv[i].a_type == M5_AT_RANDOM) {
auxv[i].a_val = aux_random_base;
// Just leave the value 0, we don't want randomness
}
//Copy the aux stuff
- for(int x = 0; x < auxv.size(); x++)
- {
- initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
+ for (int x = 0; x < auxv.size(); x++) {
+ initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
(uint8_t*)&(auxv[x].a_type), intSize);
- initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
+ initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
(uint8_t*)&(auxv[x].a_val), intSize);
}
//Write out the terminating zeroed auxilliary vector
const uint64_t zero = 0;
- initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
+ initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
(uint8_t*)&zero, 2 * intSize);
copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
- initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
+ initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
ThreadContext *tc = system->getThreadContext(contextIds[0]);
//Set the stack pointer register
- tc->setIntReg(StackPointerReg, stack_min);
+ tc->setIntReg(spIndex, stack_min);
//A pointer to a function to run when the program exits. We'll set this
//to zero explicitly to make sure this isn't used.
tc->setIntReg(ArgumentReg0, 0);
PCState pc;
pc.thumb(arch == ObjectFile::Thumb);
pc.nextThumb(pc.thumb());
+ pc.aarch64(arch == ObjectFile::Arm64);
+ pc.nextAArch64(pc.aarch64());
pc.set(objFile->entryPoint() & ~mask(1));
tc->pcState(pc);
}
ArmISA::IntReg
-ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
+ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i)
{
assert(i < 6);
return tc->readIntReg(ArgumentReg0 + i++);
}
-uint64_t
-ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width)
+ArmISA::IntReg
+ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i)
+{
+ assert(i < 8);
+ return tc->readIntReg(ArgumentReg0 + i++);
+}
+
+ArmISA::IntReg
+ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i, int width)
{
assert(width == 32 || width == 64);
if (width == 32)
return val;
}
+ArmISA::IntReg
+ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i, int width)
+{
+ return getSyscallArg(tc, i);
+}
+
+
+void
+ArmLiveProcess32::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val)
+{
+ assert(i < 6);
+ tc->setIntReg(ArgumentReg0 + i, val);
+}
void
-ArmLiveProcess::setSyscallArg(ThreadContext *tc,
+ArmLiveProcess64::setSyscallArg(ThreadContext *tc,
int i, ArmISA::IntReg val)
{
- assert(i < 4);
+ assert(i < 8);
tc->setIntReg(ArgumentReg0 + i, val);
}
void
-ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
- SyscallReturn return_value)
+ArmLiveProcess32::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
+{
+
+ if (objFile->getOpSys() == ObjectFile::FreeBSD) {
+ // Decode return value
+ if (sysret.encodedValue() >= 0)
+ // FreeBSD checks the carry bit to determine if syscall is succeeded
+ tc->setCCReg(CCREG_C, 0);
+ else {
+ sysret = -sysret.encodedValue();
+ }
+ }
+
+ tc->setIntReg(ReturnValueReg, sysret.encodedValue());
+}
+
+void
+ArmLiveProcess64::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
{
- tc->setIntReg(ReturnValueReg, return_value.value());
+
+ if (objFile->getOpSys() == ObjectFile::FreeBSD) {
+ // Decode return value
+ if (sysret.encodedValue() >= 0)
+ // FreeBSD checks the carry bit to determine if syscall is succeeded
+ tc->setCCReg(CCREG_C, 0);
+ else {
+ sysret = -sysret.encodedValue();
+ }
+ }
+
+ tc->setIntReg(ReturnValueReg, sysret.encodedValue());
}