mem-cache: Add multiple eviction stats

[gem5.git] / src / arch / arm / remote_gdb.hh

diff --git a/src/arch/arm/remote_gdb.hh b/src/arch/arm/remote_gdb.hh
index 80a0bf1b12f629f343a407503628e01ea4233db4..e52ed663ab0062ec41d33bc9429113b4418d8f77 100644 (file)
--- a/src/arch/arm/remote_gdb.hh
+++ b/src/arch/arm/remote_gdb.hh
@@ -1,6 +1,7 @@
 /*
+ * Copyright 2015 LabWare
  * Copyright 2014 Google, Inc.
- * Copyright (c) 2013 ARM Limited
+ * Copyright (c) 2013, 2016, 2018-2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -41,6 +42,7 @@
  *
  * Authors: Nathan Binkert
  *          Stephen Hines
+ *          Boris Shingarov
  */
 
 #ifndef __ARCH_ARM_REMOTE_GDB_HH__
@@ -48,6 +50,9 @@
 
 #include <algorithm>
 
+#include "arch/arm/registers.hh"
+#include "arch/arm/utility.hh"
+#include "base/compiler.hh"
 #include "base/remote_gdb.hh"
 
 class System;
@@ -56,39 +61,70 @@ class ThreadContext;
 namespace ArmISA
 {
 
-// AArch32 registers with vfpv3/neon
-enum {
-    GDB32_R0 = 0,
-    GDB32_CPSR = 16,
-    GDB32_F0 = 17,
-    GDB32_FPSCR = 81,
-    GDB32_NUMREGS = 82
-};
-
-// AArch64 registers
-enum {
-    GDB64_X0 = 0,
-    GDB64_PC = 32,
-    GDB64_CPSR = 33,
-    GDB64_V0 = 34,
-    GDB64_V0_32 = 2 * GDB64_V0,
-    GDB64_NUMREGS = 98
-};
-
-const int GDB_REG_BYTES = std::max(GDB64_NUMREGS * sizeof(uint64_t),
-                                   GDB32_NUMREGS * sizeof(uint32_t));
-
 class RemoteGDB : public BaseRemoteGDB
 {
   protected:
     bool acc(Addr addr, size_t len);
-    bool write(Addr addr, size_t size, const char *data);
 
-    void getregs();
-    void setregs();
+    class AArch32GdbRegCache : public BaseGdbRegCache
+    {
+      using BaseGdbRegCache::BaseGdbRegCache;
+      private:
+        struct {
+          uint32_t gpr[16];
+          uint32_t cpsr;
+          uint64_t fpr[32];
+          uint32_t fpscr;
+        } M5_ATTR_PACKED r;
+      public:
+        char *data() const { return (char *)&r; }
+        size_t size() const { return sizeof(r); }
+        void getRegs(ThreadContext*);
+        void setRegs(ThreadContext*) const;
+        const std::string
+        name() const
+        {
+            return gdb->name() + ".AArch32GdbRegCache";
+        }
+    };
+
+    class AArch64GdbRegCache : public BaseGdbRegCache
+    {
+      using BaseGdbRegCache::BaseGdbRegCache;
+      private:
+        struct {
+          uint64_t x[31];
+          uint64_t spx;
+          uint64_t pc;
+          uint32_t cpsr;
+          VecElem v[NumVecV8ArchRegs * NumVecElemPerNeonVecReg];
+          uint32_t fpsr;
+          uint32_t fpcr;
+        } M5_ATTR_PACKED r;
+      public:
+        char *data() const { return (char *)&r; }
+        size_t size() const { return sizeof(r); }
+        void getRegs(ThreadContext*);
+        void setRegs(ThreadContext*) const;
+        const std::string
+        name() const
+        {
+            return gdb->name() + ".AArch64GdbRegCache";
+        }
+    };
+
+    AArch32GdbRegCache regCache32;
+    AArch64GdbRegCache regCache64;
 
   public:
-    RemoteGDB(System *_system, ThreadContext *tc);
+    RemoteGDB(System *_system, ThreadContext *tc, int _port);
+    BaseGdbRegCache *gdbRegs();
+    std::vector<std::string>
+    availableFeatures() const
+    {
+        return {"qXfer:features:read+"};
+    };
+    bool getXferFeaturesRead(const std::string &annex, std::string &output);
 };
 } // namespace ArmISA