/*
- * Copyright (c) 2010, 2012-2013, 2015,2017-2018 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2015,2017-2019 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "cpu/thread_context.hh"
+#include "dev/arm/gic_v2.hh"
#include "mem/fs_translating_port_proxy.hh"
#include "mem/physical.hh"
#include "sim/full_system.hh"
_haveVirtualization(p->have_virtualization),
_haveCrypto(p->have_crypto),
_genericTimer(nullptr),
+ _gic(nullptr),
_resetAddr(p->auto_reset_addr ?
(kernelEntry & loadAddrMask) + loadAddrOffset :
p->reset_addr),
_highestELIs64(p->highest_el_is_64),
_physAddrRange64(p->phys_addr_range_64),
_haveLargeAsid64(p->have_large_asid_64),
- _m5opRange(p->m5ops_base ?
- RangeSize(p->m5ops_base, 0x10000) :
- AddrRange(1, 0)), // Create an empty range if disabled
+ _haveSVE(p->have_sve),
+ _sveVL(p->sve_vl),
+ _haveLSE(p->have_lse),
+ _havePAN(p->have_pan),
semihosting(p->semihosting),
multiProc(p->multi_proc)
{
const Params* p = params();
if (bootldr) {
- bootldr->loadSections(physProxy);
+ bool is_gic_v2 =
+ getGIC()->supportsVersion(BaseGic::GicVersion::GIC_V2);
+ bootldr->buildImage().write(physProxy);
inform("Using bootloader at address %#x\n", bootldr->entryPoint());
// Put the address of the boot loader into r7 so we know
// where to branch to after the reset fault
// All other values needed by the boot loader to know what to do
- if (!p->gic_cpu_addr || !p->flags_addr)
- fatal("gic_cpu_addr && flags_addr must be set with bootloader\n");
+ if (!p->flags_addr)
+ fatal("flags_addr must be set with bootloader\n");
+
+ if (!p->gic_cpu_addr && is_gic_v2)
+ fatal("gic_cpu_addr must be set with bootloader\n");
for (int i = 0; i < threadContexts.size(); i++) {
if (!_highestELIs64)
threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) +
loadAddrOffset);
-
- threadContexts[i]->setIntReg(4, params()->gic_cpu_addr);
+ if (is_gic_v2)
+ threadContexts[i]->setIntReg(4, params()->gic_cpu_addr);
threadContexts[i]->setIntReg(5, params()->flags_addr);
}
inform("Using kernel entry physical address at %#x\n",
}
}
+ArmSystem *
+ArmSystem::getArmSystem(System *sys)
+{
+ ArmSystem *a_sys = dynamic_cast<ArmSystem *>(sys);
+ assert(a_sys);
+ return a_sys;
+}
+
ArmSystem*
ArmSystem::getArmSystem(ThreadContext *tc)
{