misc: Merge branch v20.1.0.3 hotfix into develop

[gem5.git] / src / arch / arm / system.hh

diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index e76245ea4a4017ad9496a1e74f7714f503142c22..1db60247f3c0820e75906859b88607f41da5e656 100644 (file)
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2013, 2015-2020 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2015-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -112,6 +112,11 @@ class ArmSystem : public System
      */
     const bool _haveLargeAsid64;
 
+    /**
+     * True if system implements the transactional memory extension (TME)
+     */
+    const bool _haveTME;
+
     /**
      * True if SVE is implemented (ARMv8)
      */
@@ -125,6 +130,9 @@ class ArmSystem : public System
      */
     const bool _haveLSE;
 
+    /** True if FEAT_VHE (Virtualization Host Extensions) is implemented */
+    const bool _haveVHE;
+
     /** True if Priviledge Access Never is implemented */
     const unsigned _havePAN;
 
@@ -141,13 +149,13 @@ class ArmSystem : public System
     static constexpr Addr PageShift = ArmISA::PageShift;
 
     typedef ArmSystemParams Params;
-    const Params *
+    const Params &
     params() const
     {
-        return dynamic_cast<const Params *>(_params);
+        return dynamic_cast<const Params &>(_params);
     }
 
-    ArmSystem(Params *p);
+    ArmSystem(const Params &p);
 
     /** true if this a multiprocessor system */
     bool multiProc;
@@ -199,14 +207,14 @@ class ArmSystem : public System
     bool highestELIs64() const { return _highestELIs64; }
 
     /** Returns the highest implemented exception level */
-    ExceptionLevel
+    ArmISA::ExceptionLevel
     highestEL() const
     {
         if (_haveSecurity)
-            return EL3;
+            return ArmISA::EL3;
         if (_haveVirtualization)
-            return EL2;
-        return EL1;
+            return ArmISA::EL2;
+        return ArmISA::EL1;
     }
 
     /** Returns the reset address if the highest implemented exception level is
@@ -217,6 +225,11 @@ class ArmSystem : public System
     /** Returns true if ASID is 16 bits in AArch64 (ARMv8) */
     bool haveLargeAsid64() const { return _haveLargeAsid64; }
 
+    /** Returns true if this system implements the transactional
+      * memory extension (ARMv9)
+      */
+    bool haveTME() const { return _haveTME; }
+
     /** Returns true if SVE is implemented (ARMv8) */
     bool haveSVE() const { return _haveSVE; }
 
@@ -226,6 +239,9 @@ class ArmSystem : public System
     /** Returns true if LSE is implemented (ARMv8.1) */
     bool haveLSE() const { return _haveLSE; }
 
+    /** Returns true if Virtualization Host Extensions is implemented */
+    bool haveVHE() const { return _haveVHE; }
+
     /** Returns true if Priviledge Access Never is implemented */
     bool havePAN() const { return _havePAN; }
 
@@ -287,10 +303,15 @@ class ArmSystem : public System
     /** Returns the highest implemented exception level for the system of a
      * specific thread context
      */
-    static ExceptionLevel highestEL(ThreadContext *tc);
+    static ArmISA::ExceptionLevel highestEL(ThreadContext *tc);
 
     /** Return true if the system implements a specific exception level */
-    static bool haveEL(ThreadContext *tc, ExceptionLevel el);
+    static bool haveEL(ThreadContext *tc, ArmISA::ExceptionLevel el);
+
+    /** Returns true if the system of a specific thread context implements the
+     * transactional memory extension (TME)
+     */
+    static bool haveTME(ThreadContext *tc);
 
     /** Returns the reset address if the highest implemented exception level
      * for the system of a specific thread context is 64 bits (ARMv8)