mem-cache: Add multiple eviction stats

[gem5.git] / src / arch / arm / system.hh

diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index 263dd289ec3349e66b7bacde2eb4e54a748de623..90fed14a790f676d4d8a805441bbcba6855d2054 100644 (file)
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2013, 2015-2018 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2015-2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -131,10 +131,12 @@ class ArmSystem : public System
     const unsigned _sveVL;
 
     /**
-     * Range for memory-mapped m5 pseudo ops. The range will be
-     * invalid/empty if disabled.
+     * True if LSE is implemented (ARMv8.1)
      */
-    const AddrRange _m5opRange;
+    const bool _haveLSE;
+
+    /** True if Priviledge Access Never is implemented */
+    const unsigned _havePAN;
 
     /**
      * True if the Semihosting interface is enabled.
@@ -241,6 +243,12 @@ class ArmSystem : public System
     /** Returns the SVE vector length at reset, in quadwords */
     unsigned sveVL() const { return _sveVL; }
 
+    /** Returns true if LSE is implemented (ARMv8.1) */
+    bool haveLSE() const { return _haveLSE; }
+
+    /** Returns true if Priviledge Access Never is implemented */
+    bool havePAN() const { return _havePAN; }
+
     /** Returns the supported physical address range in bits if the highest
      * implemented exception level is 64 bits (ARMv8) */
     uint8_t physAddrRange64() const { return _physAddrRange64; }
@@ -270,6 +278,13 @@ class ArmSystem : public System
     /** Is Arm Semihosting support enabled? */
     bool haveSemihosting() const { return semihosting != nullptr; }
 
+    /**
+     * Casts the provided System object into a valid ArmSystem, it fails
+     * otherwise.
+     * @param sys System object to cast
+     */
+    static ArmSystem *getArmSystem(System *sys);
+
     /**
      * Returns a valid ArmSystem pointer if using ARM ISA, it fails
      * otherwise.