mem-cache: Add multiple eviction stats

[gem5.git] / src / arch / arm / tlb.hh

diff --git a/src/arch/arm/tlb.hh b/src/arch/arm/tlb.hh
index 637240abb90c7c962c3485fb3e1644cd402ebe13..ea78a21b5dcceb0c6ce16fd1d9b8cdf1a4baf9bf 100644 (file)
--- a/src/arch/arm/tlb.hh
+++ b/src/arch/arm/tlb.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2013, 2016, 2018 ARM Limited
+ * Copyright (c) 2010-2013, 2016, 2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -212,7 +212,7 @@ class TLB : public BaseTLB
      */
     TlbEntry *lookup(Addr vpn, uint16_t asn, uint8_t vmid, bool hyp,
                      bool secure, bool functional,
-                     bool ignore_asn, uint8_t target_el);
+                     bool ignore_asn, ExceptionLevel target_el);
 
     virtual ~TLB();
 
@@ -244,19 +244,20 @@ class TLB : public BaseTLB
     Fault checkPermissions(TlbEntry *te, const RequestPtr &req, Mode mode);
     Fault checkPermissions64(TlbEntry *te, const RequestPtr &req, Mode mode,
                              ThreadContext *tc);
+    bool checkPAN(ThreadContext *tc, uint8_t ap, const RequestPtr &req,
+                  Mode mode);
 
 
     /** Reset the entire TLB
      * @param secure_lookup if the operation affects the secure world
      */
-    void flushAllSecurity(bool secure_lookup, uint8_t target_el,
+    void flushAllSecurity(bool secure_lookup, ExceptionLevel target_el,
                           bool ignore_el = false);
 
     /** Remove all entries in the non secure world, depending on whether they
      *  were allocated in hyp mode or not
-     * @param hyp if the opperation affects hyp mode
      */
-    void flushAllNs(bool hyp, uint8_t target_el, bool ignore_el = false);
+    void flushAllNs(ExceptionLevel target_el, bool ignore_el = false);
 
 
     /** Reset the entire TLB. Used for CPU switching to prevent stale
@@ -264,8 +265,8 @@ class TLB : public BaseTLB
      */
     void flushAll() override
     {
-        flushAllSecurity(false, 0, true);
-        flushAllSecurity(true, 0, true);
+        flushAllSecurity(false, EL0, true);
+        flushAllSecurity(true, EL0, true);
     }
 
     /** Remove any entries that match both a va and asn
@@ -274,29 +275,28 @@ class TLB : public BaseTLB
      * @param secure_lookup if the operation affects the secure world
      */
     void flushMvaAsid(Addr mva, uint64_t asn, bool secure_lookup,
-                      uint8_t target_el);
+                      ExceptionLevel target_el);
 
     /** Remove any entries that match the asn
      * @param asn contextid/asn to flush on match
      * @param secure_lookup if the operation affects the secure world
      */
-    void flushAsid(uint64_t asn, bool secure_lookup, uint8_t target_el);
+    void flushAsid(uint64_t asn, bool secure_lookup,
+                   ExceptionLevel target_el);
 
     /** Remove all entries that match the va regardless of asn
      * @param mva address to flush from cache
      * @param secure_lookup if the operation affects the secure world
-     * @param hyp if the operation affects hyp mode
      */
-    void flushMva(Addr mva, bool secure_lookup, bool hyp, uint8_t target_el);
+    void flushMva(Addr mva, bool secure_lookup, ExceptionLevel target_el);
 
     /**
      * Invalidate all entries in the stage 2 TLB that match the given ipa
      * and the current VMID
      * @param ipa the address to invalidate
      * @param secure_lookup if the operation affects the secure world
-     * @param hyp if the operation affects hyp mode
      */
-    void flushIpaVmid(Addr ipa, bool secure_lookup, bool hyp, uint8_t target_el);
+    void flushIpaVmid(Addr ipa, bool secure_lookup, ExceptionLevel target_el);
 
     Fault trickBoxCheck(const RequestPtr &req, Mode mode,
                         TlbEntry::DomainType domain);
@@ -392,7 +392,7 @@ class TLB : public BaseTLB
     void regProbePoints() override;
 
     /**
-     * Get the table walker master port. This is used for migrating
+     * Get the table walker port. This is used for migrating
      * port connections during a CPU takeOverFrom() call. For
      * architectures that do not have a table walker, NULL is
      * returned, hence the use of a pointer rather than a
@@ -401,7 +401,7 @@ class TLB : public BaseTLB
      *
      * @return A pointer to the walker master port
      */
-    BaseMasterPort* getMasterPort() override;
+    Port *getTableWalkerPort() override;
 
     // Caching misc register values here.
     // Writing to misc registers needs to invalidate them.
@@ -450,13 +450,10 @@ private:
      * @param mva virtual address to flush
      * @param asn contextid/asn to flush on match
      * @param secure_lookup if the operation affects the secure world
-     * @param hyp if the operation affects hyp mode
      * @param ignore_asn if the flush should ignore the asn
      */
     void _flushMva(Addr mva, uint64_t asn, bool secure_lookup,
-                   bool hyp, bool ignore_asn, uint8_t target_el);
-
-    bool checkELMatch(uint8_t target_el, uint8_t tentry_el, bool ignore_el);
+                   bool ignore_asn, ExceptionLevel target_el);
 
   public: /* Testing */
     Fault testTranslation(const RequestPtr &req, Mode mode,