#include "arch/generic/types.hh"
#include "base/bitunion.hh"
-#include "base/hashmap.hh"
#include "base/misc.hh"
#include "base/types.hh"
#include "debug/Decoder.hh"
Bitfield<1, 0> bottom2;
EndBitUnion(ITSTATE)
-
BitUnion64(ExtMachInst)
+ // Decoder state
+ Bitfield<63, 62> decoderFault; // See DecoderFault
+
// ITSTATE bits
Bitfield<55, 48> itstate;
Bitfield<55, 52> itstateCond;
uint8_t _nextItstate;
uint8_t _size;
public:
- PCState() : flags(0), nextFlags(0), _itstate(0), _nextItstate(0)
+ PCState() : flags(0), nextFlags(0), _itstate(0), _nextItstate(0),
+ _size(0)
{}
void
npc(val + (thumb() ? 2 : 4));
}
- PCState(Addr val) : flags(0), nextFlags(0), _itstate(0), _nextItstate(0)
+ PCState(Addr val) : flags(0), nextFlags(0), _itstate(0),
+ _nextItstate(0), _size(0)
{ set(val); }
bool
}
void
- serialize(std::ostream &os)
+ serialize(CheckpointOut &cp) const override
{
- Base::serialize(os);
+ Base::serialize(cp);
SERIALIZE_SCALAR(flags);
SERIALIZE_SCALAR(_size);
SERIALIZE_SCALAR(nextFlags);
}
void
- unserialize(Checkpoint *cp, const std::string §ion)
+ unserialize(CheckpointIn &cp) override
{
- Base::unserialize(cp, section);
+ Base::unserialize(cp);
UNSERIALIZE_SCALAR(flags);
UNSERIALIZE_SCALAR(_size);
UNSERIALIZE_SCALAR(nextFlags);
SXTX = 7
};
- typedef uint64_t LargestRead;
- // Need to use 64 bits to make sure that read requests get handled properly
-
typedef int RegContextParam;
typedef int RegContextVal;
EC_SERROR = 0x2F
};
+ /**
+ * Instruction decoder fault codes in ExtMachInst.
+ */
+ enum DecoderFault : std::uint8_t {
+ OK = 0x0, ///< No fault
+ UNALIGNED = 0x1, ///< Unaligned instruction fault
+
+ PANIC = 0x3, ///< Internal gem5 error
+ };
+
BitUnion8(OperatingMode64)
Bitfield<0> spX;
Bitfield<3, 2> el;
} // namespace ArmISA
-__hash_namespace_begin
+namespace std {
template<>
struct hash<ArmISA::ExtMachInst> :
};
-__hash_namespace_end
+}
#endif