stats: update stats for mmap() change.

[gem5.git] / src / arch / arm / types.hh

diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index cebbcef698687a5f82f4e889303539da974e9b9c..9fd945abe3ca2291eb709e4637c18871ef2d1bfb 100644 (file)
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -45,7 +45,6 @@
 
 #include "arch/generic/types.hh"
 #include "base/bitunion.hh"
-#include "base/hashmap.hh"
 #include "base/misc.hh"
 #include "base/types.hh"
 #include "debug/Decoder.hh"
@@ -68,8 +67,10 @@ namespace ArmISA
         Bitfield<1, 0> bottom2;
     EndBitUnion(ITSTATE)
 
-
     BitUnion64(ExtMachInst)
+        // Decoder state
+        Bitfield<63, 62> decoderFault; // See DecoderFault
+
         // ITSTATE bits
         Bitfield<55, 48> itstate;
         Bitfield<55, 52> itstateCond;
@@ -481,9 +482,9 @@ namespace ArmISA
         }
 
         void
-        serialize(std::ostream &os)
+        serialize(CheckpointOut &cp) const override
         {
-            Base::serialize(os);
+            Base::serialize(cp);
             SERIALIZE_SCALAR(flags);
             SERIALIZE_SCALAR(_size);
             SERIALIZE_SCALAR(nextFlags);
@@ -492,9 +493,9 @@ namespace ArmISA
         }
 
         void
-        unserialize(Checkpoint *cp, const std::string &section)
+        unserialize(CheckpointIn &cp) override
         {
-            Base::unserialize(cp, section);
+            Base::unserialize(cp);
             UNSERIALIZE_SCALAR(flags);
             UNSERIALIZE_SCALAR(_size);
             UNSERIALIZE_SCALAR(nextFlags);
@@ -523,9 +524,6 @@ namespace ArmISA
         SXTX = 7
     };
 
-    typedef uint64_t LargestRead;
-    // Need to use 64 bits to make sure that read requests get handled properly
-
     typedef int RegContextParam;
     typedef int RegContextVal;
 
@@ -626,6 +624,16 @@ namespace ArmISA
         EC_SERROR                  = 0x2F
     };
 
+    /**
+     * Instruction decoder fault codes in ExtMachInst.
+     */
+    enum DecoderFault : std::uint8_t {
+        OK = 0x0, ///< No fault
+        UNALIGNED = 0x1, ///< Unaligned instruction fault
+
+        PANIC = 0x3, ///< Internal gem5 error
+    };
+
     BitUnion8(OperatingMode64)
         Bitfield<0> spX;
         Bitfield<3, 2> el;
@@ -728,7 +736,7 @@ namespace ArmISA
 
 } // namespace ArmISA
 
-__hash_namespace_begin
+namespace std {
 
 template<>
 struct hash<ArmISA::ExtMachInst> :
@@ -740,6 +748,6 @@ struct hash<ArmISA::ExtMachInst> :
 
 };
 
-__hash_namespace_end
+}
 
 #endif