mem: Use the new unbound port reporting mechanism in the mem ports.

[gem5.git] / src / arch / hsail / gpu_isa.hh

diff --git a/src/arch/hsail/gpu_isa.hh b/src/arch/hsail/gpu_isa.hh
index dbd816d9131f3ded7cffade8872035eca95efdbd..75063cb5da160a0c691a9f685e606dc681dc0ddb 100644 (file)
--- a/src/arch/hsail/gpu_isa.hh
+++ b/src/arch/hsail/gpu_isa.hh
@@ -29,8 +29,6 @@
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Anthony Gutierrez
  */
 
 #ifndef __ARCH_HSAIL_GPU_ISA_HH__
@@ -38,29 +36,27 @@
 
 #include <cstdint>
 
-#include "base/misc.hh"
+#include "arch/hsail/gpu_types.hh"
+#include "base/logging.hh"
+#include "base/types.hh"
 #include "gpu-compute/misc.hh"
 
-class Wavefront;
-
 namespace HsailISA
 {
-    typedef uint64_t MiscReg;
-
     class GPUISA
     {
       public:
-        GPUISA(Wavefront &wf) : wavefront(wf)
+        GPUISA()
         {
         }
 
         void
-        writeMiscReg(int opIdx, MiscReg operandVal)
+        writeMiscReg(int opIdx, RegVal operandVal)
         {
             fatal("HSAIL does not implement misc registers yet\n");
         }
 
-        MiscReg
+        RegVal
         readMiscReg(int opIdx) const
         {
             fatal("HSAIL does not implement misc registers yet\n");
@@ -71,11 +67,8 @@ namespace HsailISA
         uint32_t
         advancePC(uint32_t old_pc, GPUDynInstPtr gpuDynInst)
         {
-            return old_pc + 1;
+            return old_pc + sizeof(RawMachInst);
         }
-
-      private:
-        Wavefront &wavefront;
     };
 }