ARM: DFSR status value for sync external data abort is expected to be 0x8 in ARMv7

[gem5.git] / src / arch / micro_asm_test.py

diff --git a/src/arch/micro_asm_test.py b/src/arch/micro_asm_test.py
index f0aebe2b24da06a17a55f793bec36018cbc7b538..b074ecb58f55e20110102f25b06bdadb70ece2cb 100755 (executable)
--- a/src/arch/micro_asm_test.py
+++ b/src/arch/micro_asm_test.py
@@ -91,6 +91,13 @@ def macroop squishy {
     .tweak
 };
 
+#Extending the rom...
+def rom
+{
+    #Here's more stuff for the rom
+    bah
+};
+
 def macroop squashy {
     bah
 };