base: Rename Section to Segment, and some of its members.

[gem5.git] / src / arch / micro_asm_test.py

diff --git a/src/arch/micro_asm_test.py b/src/arch/micro_asm_test.py
index f0aebe2b24da06a17a55f793bec36018cbc7b538..e5755f717a4a3e796d74bcaf012672ea0be00ac7 100755 (executable)
--- a/src/arch/micro_asm_test.py
+++ b/src/arch/micro_asm_test.py
@@ -26,6 +26,8 @@
 #
 # Authors: Gabe Black
 
+from __future__ import print_function
+
 from micro_asm import MicroAssembler, Combinational_Macroop, Rom_Macroop, Rom
 
 class Bah(object):
@@ -58,7 +60,7 @@ class TestMacroop(Combinational_Macroop):
     def untweak(self):
         microops["bah"] = Bah
     def print_debug(self, message):
-        print message
+        print(message)
 
     def __init__(self, name):
         super(TestMacroop, self).__init__(name)
@@ -91,6 +93,13 @@ def macroop squishy {
     .tweak
 };
 
+#Extending the rom...
+def rom
+{
+    #Here's more stuff for the rom
+    bah
+};
+
 def macroop squashy {
     bah
 };