cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped.

[gem5.git] / src / arch / mips / MipsSystem.py

diff --git a/src/arch/mips/MipsSystem.py b/src/arch/mips/MipsSystem.py
index 4a0851eba4142ad71c3b2fc68108ed7faed07dee..4605b21a725cf2d4e8c897b9c993dab5fb801fff 100644 (file)
--- a/src/arch/mips/MipsSystem.py
+++ b/src/arch/mips/MipsSystem.py
@@ -36,6 +36,7 @@ from System import System
 
 class MipsSystem(System):
     type = 'MipsSystem'
+    cxx_header = 'arch/mips/system.hh'
     console = Param.String("file that contains the console code")
     bare_iron = Param.Bool(False, "Using Bare Iron Mode?")
     hex_file_name = Param.String("test.hex","hex file that contains [address,data] pairs")
@@ -45,14 +46,16 @@ class MipsSystem(System):
 
 class LinuxMipsSystem(MipsSystem):
     type = 'LinuxMipsSystem'
+    cxx_header = 'arch/mips/linux/system.hh'
     system_type = 34
     system_rev = 1 << 10
 
-    boot_cpu_frequency = Param.Frequency(Self.cpu[0].clock.frequency,
+    boot_cpu_frequency = Param.Frequency(Self.cpu[0].clk_domain.clock.frequency,
                                          "boot processor frequency")
 
 class BareIronMipsSystem(MipsSystem):
     type = 'BareIronMipsSystem'
+    cxx_header = 'arch/mips/bare_iron/system.hh'
     bare_iron = True
     system_type = 34
     system_rev = 1 << 10