mips: Delete authors lists from mips files.

[gem5.git] / src / arch / mips / isa / bitfields.isa

diff --git a/src/arch/mips/isa/bitfields.isa b/src/arch/mips/isa/bitfields.isa
index 35815bf1f823b84a8ff16ce8433ba0c6a974e2ef..56d815766118b085827d2f86115949fc008b4853 100644 (file)
--- a/src/arch/mips/isa/bitfields.isa
+++ b/src/arch/mips/isa/bitfields.isa
@@ -1,6 +1,6 @@
 // -*- mode:c++ -*-
 
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2007 MIPS Technologies, Inc.
 // All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
@@ -25,8 +25,6 @@
 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Korey Sewell
 
 ////////////////////////////////////////////////////////////////////
 //
@@ -45,26 +43,27 @@ def bitfield FUNCTION      < 5: 0>;
 def bitfield FUNCTION_HI   < 5: 3>;
 def bitfield FUNCTION_LO   < 2: 0>;
 
-def bitfield RS              <25:21>;
+def bitfield RS       <25:21>;
 def bitfield RS_MSB   <25:25>;
 def bitfield RS_HI    <25:24>;
 def bitfield RS_LO    <23:21>;
 def bitfield RS_SRL   <25:22>;
 def bitfield RS_RT    <25:16>;
-def bitfield RT              <20:16>;
+def bitfield RT       <20:16>;
 def bitfield RT_HI    <20:19>;
 def bitfield RT_LO    <18:16>;
 def bitfield RT_RD    <20:11>;
-def bitfield RD              <15:11>;
+def bitfield RD       <15:11>;
 
-def bitfield INTIMM      <15: 0>;
+def bitfield INTIMM       <15: 0>;
+def bitfield RS_RT_INTIMM <25: 0>;
 
 // Floating-point operate format
 def bitfield FMT      <25:21>;
 def bitfield FR       <25:21>;
-def bitfield FT              <20:16>;
-def bitfield FS              <15:11>;
-def bitfield FD              <10:6>;
+def bitfield FT       <20:16>;
+def bitfield FS       <15:11>;
+def bitfield FD       <10:6>;
 
 def bitfield ND       <17:17>;
 def bitfield TF       <16:16>;
@@ -81,22 +80,42 @@ def bitfield BRANCH_CC <20:18>;
 // CP0 Register Select
 def bitfield SEL       < 2: 0>;
 
-// Interrupts
+// INTERRUPTS
 def bitfield SC       < 5: 5>;
 
 // Branch format
 def bitfield OFFSET <15: 0>; // displacement
 
 // Jmp format
-def bitfield JMPTARG   <25: 0>;
-def bitfield HINT      <10: 6>;
+def bitfield JMPTARG    <25: 0>;
+def bitfield HINT       <10: 6>;
 
 def bitfield SYSCALLCODE <25: 6>;
 def bitfield TRAPCODE    <15:13>;
 
 // EXT/INS instructions
-def bitfield MSB       <15:11>;
-def bitfield LSB       <10: 6>;
+def bitfield MSB        <15:11>;
+def bitfield LSB        <10: 6>;
 
 // M5 instructions
 def bitfield M5FUNC <7:0>;
+
+// DSP instructions
+def bitfield OP        <10:6>;
+def bitfield OP_HI     <10:9>;
+def bitfield OP_LO     <8:6>;
+def bitfield DSPSA     <23:21>;
+def bitfield HILOSA    <25:20>;
+def bitfield RDDSPMASK <21:16>;
+def bitfield WRDSPMASK <16:11>;
+def bitfield ACSRC     <22:21>;
+def bitfield ACDST     <12:11>;
+def bitfield BP        <12:11>;
+
+// MT Instructions
+def bitfield POS   <10: 6>;
+def bitfield MT_U     <5:5>;
+def bitfield MT_H     <4:4>;
+
+//Cache Ops
+def bitfield CACHE_OP <20:16>;