cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped.

[gem5.git] / src / arch / mips / isa.hh

diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh
index 5ae779a6c4603fe06d3b7b98da51d8555cdb493a..c601cfc1eda74c442e963780acb5594316af777c 100644 (file)
--- a/src/arch/mips/isa.hh
+++ b/src/arch/mips/isa.hh
@@ -159,6 +159,9 @@ namespace MipsISA
       public:
         void startup(ThreadContext *tc) {}
 
+        /// Explicitly import the otherwise hidden startup
+        using SimObject::startup;
+
         const Params *params() const;
 
         ISA(Params *p);
@@ -174,6 +177,13 @@ namespace MipsISA
         {
             return reg;
         }
+
+        // dummy
+        int
+        flattenCCIndex(int reg)
+        {
+            return reg;
+        }
     };
 }