+
/*
* Copyright (c) 2006 The Regents of The University of Michigan
* All rights reserved.
#include "arch/mips/types.hh"
#include "base/misc.hh"
-#include "sim/host.hh"
+#include "base/types.hh"
class ThreadContext;
namespace MipsISA
{
- class Predecoder
+
+class Predecoder
+{
+ protected:
+ ThreadContext * tc;
+ //The extended machine instruction being generated
+ ExtMachInst emi;
+
+ public:
+ Predecoder(ThreadContext * _tc) : tc(_tc)
+ {}
+
+ ThreadContext *getTC()
+ {
+ return tc;
+ }
+
+ void
+ setTC(ThreadContext *_tc)
+ {
+ tc = _tc;
+ }
+
+ void
+ process()
+ {
+ }
+
+ void
+ reset()
+ {}
+
+ //Use this to give data to the predecoder. This should be used
+ //when there is control flow.
+ void
+ moreBytes(Addr pc, Addr fetchPC, MachInst inst)
+ {
+ emi = inst;
+ }
+
+ bool
+ needMoreBytes()
+ {
+ return true;
+ }
+
+ bool
+ extMachInstReady()
+ {
+ return true;
+ }
+
+ //This returns a constant reference to the ExtMachInst to avoid a copy
+ const ExtMachInst &
+ getExtMachInst()
{
- protected:
- ThreadContext * tc;
- //The extended machine instruction being generated
- ExtMachInst emi;
-
- public:
- Predecoder(ThreadContext * _tc) : tc(_tc)
- {}
-
- ThreadContext * getTC()
- {
- return tc;
- }
-
- void setTC(ThreadContext * _tc)
- {
- tc = _tc;
- }
-
- void process()
- {
- }
-
- //Use this to give data to the predecoder. This should be used
- //when there is control flow.
- void moreBytes(Addr pc, Addr fetchPC, Addr off, MachInst inst)
- {
- assert(off == 0);
- emi = inst;
- }
-
- bool needMoreBytes()
- {
- return true;
- }
-
- bool extMachInstReady()
- {
- return true;
- }
-
- //This returns a constant reference to the ExtMachInst to avoid a copy
- const ExtMachInst & getExtMachInst()
- {
- return emi;
- }
- };
+ return emi;
+ }
+};
+
};
#endif // __ARCH_MIPS_PREDECODER_HH__