/*
- * Copyright \e.A\eN) 2007 MIPS Technologies, Inc. All Rights Reserved
+ * Copyright (c) 2004-2005 The Regents of The University of Michigan
+ * All rights reserved.
*
- * This software is part of the M5 simulator.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
*
- * THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
- * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
- * TO THESE TERMS AND CONDITIONS.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * Permission is granted to use, copy, create derivative works and
- * distribute this software and such derivative works for any purpose,
- * so long as (1) the copyright notice above, this grant of permission,
- * and the disclaimer below appear in all copies and derivative works
- * made, (2) the copyright notice above is augmented as appropriate to
- * reflect the addition of any new copyrightable work in a derivative
- * work (e.g., Copyright
\e.A
\eN) <Publication Year> Copyright Owner), and (3)
- * the name of MIPS Technologies, Inc. (\e$B!H\e(BMIPS\e$B!I\e(B) is not used in any
- * advertising or publicity pertaining to the use or distribution of
- * this software without specific, written prior authorization.
- *
- * THIS SOFTWARE IS PROVIDED \e$B!H\e(BAS IS.\e$B!I\e(B MIPS MAKES NO WARRANTIES AND
- * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
- * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
- * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
- * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
- * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
- * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
- * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
- * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
- * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
- * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
- *
- * Authors: Nathan L. Binkert
+ * Authors: Nathan Binkert
*/
#include <string>
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/system.hh"
using namespace std;
using namespace MipsISA;
-ProcessInfo::ProcessInfo(ThreadContext *_tc)
- : tc(_tc)
-{
-// Addr addr = 0;
-
- VirtualPort *vp;
-
- vp = tc->getVirtPort();
-
-// if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
-// panic("thread info not compiled into kernel\n");
-// thread_info_size = vp->readGtoH<int32_t>(addr);
-
-// if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr))
-// panic("thread info not compiled into kernel\n");
-// task_struct_size = vp->readGtoH<int32_t>(addr);
-
-// if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr))
-// panic("thread info not compiled into kernel\n");
-// task_off = vp->readGtoH<int32_t>(addr);
-
-// if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr))
-// panic("thread info not compiled into kernel\n");
-// pid_off = vp->readGtoH<int32_t>(addr);
-
-// if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr))
-// panic("thread info not compiled into kernel\n");
-// name_off = vp->readGtoH<int32_t>(addr);
-
- tc->delVirtPort(vp);
-}
+ProcessInfo::ProcessInfo(ThreadContext *_tc) : tc(_tc)
+{}
Addr
ProcessInfo::task(Addr ksp) const
Addr tsk;
- VirtualPort *vp;
-
- vp = tc->getVirtPort();
- tsk = vp->readGtoH<Addr>(base + task_off);
- tc->delVirtPort(vp);
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ tsk = vp.readGtoH<Addr>(base + task_off);
return tsk;
}
uint16_t pd;
- VirtualPort *vp;
-
- vp = tc->getVirtPort();
- pd = vp->readGtoH<uint16_t>(task + pid_off);
- tc->delVirtPort(vp);
+ FSTranslatingPortProxy &vp = tc->getVirtProxy();
+ pd = vp.readGtoH<uint16_t>(task + pid_off);
return pd;
}
StackTrace::trace(ThreadContext *_tc, bool is_call)
{
tc = _tc;
- /* FIXME - Jaidev - What is IPR_DTB_CM in Alpha? */
bool usermode = 0;
- //(tc->readMiscReg(MipsISA::IPR_DTB_CM) & 0x18) != 0;
-
-// Addr pc = tc->readNextPC();
-// bool kernel = tc->getSystemPtr()->kernelStart <= pc &&
-// pc <= tc->getSystemPtr()->kernelEnd;
if (usermode) {
stack.push_back(user);
return;
}
-
-// if (!kernel) {
-// stack.push_back(console);
-// return;
-// }
-
-// SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
-// Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
-// Addr bottom = ksp & ~0x3fff;
-// Addr addr;
-
-// if (is_call) {
-// if (!symtab->findNearestAddr(pc, addr))
-// panic("could not find address %#x", pc);
-
-// stack.push_back(addr);
-// pc = tc->readPC();
-// }
-
-// Addr ra;
-// int size;
-
-// while (ksp > bottom) {
-// if (!symtab->findNearestAddr(pc, addr))
-// panic("could not find symbol for pc=%#x", pc);
-// assert(pc >= addr && "symbol botch: callpc < func");
-
-// stack.push_back(addr);
-
-// if (isEntry(addr))
-// return;
-
-// if (decodePrologue(ksp, pc, addr, size, ra)) {
-// if (!ra)
-// return;
-
-// if (size <= 0) {
-// stack.push_back(unknown);
-// return;
-// }
-
-// pc = ra;
-// ksp += size;
-// } else {
-// stack.push_back(unknown);
-// return;
-// }
-
-// bool kernel = tc->getSystemPtr()->kernelStart <= pc &&
-// pc <= tc->getSystemPtr()->kernelEnd;
-// if (!kernel)
-// return;
-
-// if (stack.size() >= 1000)
-// panic("unwinding too far");
-// }
-
-// panic("unwinding too far");
}
bool
StackTrace::isEntry(Addr addr)
{
- /* if (addr == tc->readMiscReg(MipsISA::IPR_PALtemp2))
- return true;*/
-
return false;
}
int reg, disp;
if (decodeStack(inst, disp)) {
if (size) {
- // panic("decoding frame size again");
return true;
}
size += disp;
if (!ra && reg == ReturnAddressReg) {
CopyOut(tc, (uint8_t *)&ra, sp + disp, sizeof(Addr));
if (!ra) {
- // panic("no return address value pc=%#x\n", pc);
return false;
}
}
void
StackTrace::dump()
{
- StringWrap name(tc->getCpuPtr()->name());
-// SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
-
- DPRINTFN("------ Stack ------\n");
-
-// string symbol;
-// for (int i = 0, size = stack.size(); i < size; ++i) {
-// Addr addr = stack[size - i - 1];
-// if (addr == user)
-// symbol = "user";
-// else if (addr == console)
-// symbol = "console";
-// else if (addr == unknown)
-// symbol = "unknown";
-// else
-// symtab->findSymbol(addr, symbol);
-
-// DPRINTFN("%#x: %s\n", addr, symbol);
-// }
+ panic("Stack trace dump not implemented.\n");
}
#endif
projects / gem5.git / blobdiff