// MIPS TLB
//
-static inline mode_type
-getOperatingMode(MiscReg Stat)
-{
- if ((Stat & 0x10000006) != 0 || (Stat & 0x18) ==0) {
- return mode_kernel;
- } else if ((Stat & 0x18) == 0x8) {
- return mode_supervisor;
- } else if ((Stat & 0x18) == 0x10) {
- return mode_user;
- } else {
- return mode_number;
- }
-}
-
-
TLB::TLB(const Params *p)
: BaseTLB(p), size(p->size), nlu(0)
{
(pte.D0 << 2) | (pte.V0 <<1) | pte.G),
((pte.PFN1 <<6) | (pte.C1 << 3) |
(pte.D1 << 2) | (pte.V1 <<1) | pte.G));
- if (table[Index].V0 == true || table[Index].V1 == true) {
+ if (table[Index].V0 || table[Index].V1) {
// Previous entry is valid
PageTable::iterator i = lookupTable.find(table[Index].VPN);
lookupTable.erase(i);
return NoFault;
}
+Fault
+TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const
+{
+ return NoFault;
+}
+
MipsISA::PTE &
TLB::index(bool advance)