#include <map>
+#include "arch/generic/tlb.hh"
#include "arch/mips/isa_traits.hh"
#include "arch/mips/pagetable.hh"
#include "arch/mips/utility.hh"
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/MipsTLB.hh"
-#include "sim/fault_fwd.hh"
#include "sim/sim_object.hh"
-#include "sim/tlb.hh"
class ThreadContext;
int probeEntry(Addr vpn,uint8_t) const;
MipsISA::PTE *getEntry(unsigned) const;
virtual ~TLB();
+
+ void takeOverFrom(BaseTLB *otlb) {}
+
int smallPages;
int getsize() const { return size; }
* support the Checker model at the moment.
*/
Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
+ Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const;
private:
Fault translateInst(RequestPtr req, ThreadContext *tc);