sim: Move the BaseTLB to src/arch/generic/

[gem5.git] / src / arch / mips / utility.cc

diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc
index f848197560c11015740e244887878b3dcc69ff65..80047fbfdca3b439f2ca14822d867dcca126d664 100644 (file)
--- a/src/arch/mips/utility.cc
+++ b/src/arch/mips/utility.cc
@@ -231,7 +231,7 @@ zeroRegisters(CPU *cpu)
 void
 startupCPU(ThreadContext *tc, int cpuId)
 {
-    tc->activate(Cycles(0));
+    tc->activate();
 }
 
 void
@@ -241,7 +241,23 @@ initCPU(ThreadContext *tc, int cpuId)
 void
 copyRegs(ThreadContext *src, ThreadContext *dest)
 {
-    panic("Copy Regs Not Implemented Yet\n");
+    // First loop through the integer registers.
+    for (int i = 0; i < NumIntRegs; i++)
+        dest->setIntRegFlat(i, src->readIntRegFlat(i));
+
+    // Then loop through the floating point registers.
+    for (int i = 0; i < NumFloatRegs; i++)
+        dest->setFloatRegFlat(i, src->readFloatRegFlat(i));
+
+    // Would need to add condition-code regs if implemented
+    assert(NumCCRegs == 0);
+
+    // Copy misc. registers
+    for (int i = 0; i < NumMiscRegs; i++)
+        dest->setMiscRegNoEffect(i, src->readMiscRegNoEffect(i));
+
+    // Copy over the PC State
+    dest->pcState(src->pcState());
 }
 
 void