/*
- * Copyright \eN) 2007 MIPS Technologies, Inc. All Rights Reserved
+ * Copyright (c) 2007 MIPS Technologies, Inc.
+ * All rights reserved.
*
- * This software is part of the M5 simulator.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
*
- * THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
- * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
- * TO THESE TERMS AND CONDITIONS.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * Permission is granted to use, copy, create derivative works and
- * distribute this software and such derivative works for any purpose,
- * so long as (1) the copyright notice above, this grant of permission,
- * and the disclaimer below appear in all copies and derivative works
- * made, (2) the copyright notice above is augmented as appropriate to
- * reflect the addition of any new copyrightable work in a derivative
- * work (e.g., Copyright
\eN) <Publication Year> Copyright Owner), and (3)
- * the name of MIPS Technologies, Inc. (\e$(B!H\e(BMIPS\e$(B!I\e(B) is not used in any
- * advertising or publicity pertaining to the use or distribution of
- * this software without specific, written prior authorization.
- *
- * THIS SOFTWARE IS PROVIDED \e$(B!H\e(BAS IS.\e$(B!I\e(B MIPS MAKES NO WARRANTIES AND
- * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
- * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
- * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
- * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
- * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
- * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
- * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
- * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
- * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
- * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
- *
- * Authors: Korey L. Sewell
+ * Authors: Korey Sewell
*/
#include "arch/mips/isa_traits.hh"
#include "base/misc.hh"
#if FULL_SYSTEM
+#include "arch/mips/registers.hh"
#include "arch/mips/vtophys.hh"
#include "mem/vport.hh"
#endif
getArgument(ThreadContext *tc, int number, bool fp)
{
#if FULL_SYSTEM
- if (number < NumArgumentRegs) {
+ if (number < 4) {
if (fp)
- return tc->readFloatRegBits(ArgumentReg[number]);
+ return tc->readFloatRegBits(FirstArgumentReg + number);
else
- return tc->readIntReg(ArgumentReg[number]);
+ return tc->readIntReg(FirstArgumentReg + number);
} else {
Addr sp = tc->readIntReg(StackPointerReg);
- VirtualPort *vp = tc->getVirtPort(tc);
+ VirtualPort *vp = tc->getVirtPort();
uint64_t arg = vp->read<uint64_t>(sp +
- (number-NumArgumentRegs) * sizeof(uint64_t));
- tc->delVirtPort(vp);
+ (number - 4) * sizeof(uint64_t));
return arg;
}
#else
{
int cc_idx = (cc_num == 0) ? 23 : cc_num + 24;
- fcsr = bits(fcsr, 31, cc_idx + 1) << cc_idx + 1 |
+ fcsr = bits(fcsr, 31, cc_idx + 1) << (cc_idx + 1) |
cc_val << cc_idx |
bits(fcsr, cc_idx - 1, 0);
}
}
-int
-flattenIntIndex(ThreadContext * tc, int reg)
-{
- return reg;
-}
-
-
-void
-copyRegs(ThreadContext *src, ThreadContext *dest)
-{
- panic("Copy Regs Not Implemented Yet\n");
-}
-
-void
-copyMiscRegs(ThreadContext *src, ThreadContext *dest)
-{
- panic("Copy Misc. Regs Not Implemented Yet\n");
-}
-
template <class CPU>
void
zeroRegisters(CPU *cpu)
void
startupCPU(ThreadContext *tc, int cpuId)
{
- tc->activate(0/*tc->getThreadNum()*/);
+ tc->activate(0/*tc->threadId()*/);
+}
+
+void
+copyRegs(ThreadContext *src, ThreadContext *dest)
+{
+ panic("Copy Regs Not Implemented Yet\n");
+}
+
+void
+copyMiscRegs(ThreadContext *src, ThreadContext *dest)
+{
+ panic("Copy Misc. Regs Not Implemented Yet\n");
}
} // namespace MipsISA
projects / gem5.git / blobdiff