sim: Include object header files in SWIG interfaces
[gem5.git] / src / arch / power / PowerInterrupts.py
index 82d614077f5693e945e5dfc247eb7d89699f2a71..2c6a5c2c3a05625aeef75c5d2655ab54c20c1c53 100644 (file)
@@ -31,3 +31,4 @@ from m5.SimObject import SimObject
 class PowerInterrupts(SimObject):
     type = 'PowerInterrupts'
     cxx_class = 'PowerISA::Interrupts'
+    cxx_header = 'arch/power/interrupts.hh'