arch-power: Fix disassembly for load-store instructions

[gem5.git] / src / arch / power / insts / mem.hh

diff --git a/src/arch/power/insts/mem.hh b/src/arch/power/insts/mem.hh
index a5874269050a1814396a7fc867361049559594e2..f800ae3d5ae197285e3e06e9f5169c8eeaf7a075 100644 (file)
--- a/src/arch/power/insts/mem.hh
+++ b/src/arch/power/insts/mem.hh
@@ -24,8 +24,6 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Timothy M. Jones
  */
 
 #ifndef __ARCH_POWER_MEM_HH__
@@ -45,23 +43,16 @@ class MemOp : public PowerStaticInst
 
     /// Memory request flags.  See mem_req_base.hh.
     unsigned memAccessFlags;
-    /// Pointer to EAComp object.
-    const StaticInstPtr eaCompPtr;
-    /// Pointer to MemAcc object.
-    const StaticInstPtr memAccPtr;
 
     /// Constructor
-    MemOp(const char *mnem, MachInst _machInst, OpClass __opClass,
-          StaticInstPtr _eaCompPtr = nullStaticInstPtr,
-          StaticInstPtr _memAccPtr = nullStaticInstPtr)
+    MemOp(const char *mnem, MachInst _machInst, OpClass __opClass)
       : PowerStaticInst(mnem, _machInst, __opClass),
-        memAccessFlags(0),
-        eaCompPtr(_eaCompPtr),
-        memAccPtr(_memAccPtr)
+        memAccessFlags(0)
     {
     }
 
-    std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+    std::string generateDisassembly(
+            Addr pc, const Loader::SymbolTable *symtab) const override;
 };
 
 
@@ -75,15 +66,51 @@ class MemDispOp : public MemOp
     int16_t disp;
 
     /// Constructor
-    MemDispOp(const char *mnem, MachInst _machInst, OpClass __opClass,
-              StaticInstPtr _eaCompPtr = nullStaticInstPtr,
-              StaticInstPtr _memAccPtr = nullStaticInstPtr)
-      : MemOp(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr),
-        disp(machInst.d)
+    MemDispOp(const char *mnem, MachInst _machInst, OpClass __opClass)
+      : MemOp(mnem, _machInst, __opClass), disp(machInst.d)
+    {
+    }
+
+    std::string generateDisassembly(
+            Addr pc, const Loader::SymbolTable *symtab) const override;
+};
+
+/**
+ * Class for memory operations with shifted displacement.
+ */
+class MemDispShiftOp : public MemOp
+{
+  protected:
+
+    int16_t disp;
+
+    /// Constructor
+    MemDispShiftOp(const char *mnem, MachInst _machInst, OpClass __opClass)
+      : MemOp(mnem, _machInst, __opClass),
+        disp(sext<14>(machInst.ds))
+    {
+    }
+
+    std::string generateDisassembly(
+            Addr pc, const Loader::SymbolTable *symtab) const override;
+};
+
+
+/**
+ * Class for memory operations with register indexed addressing.
+ */
+class MemIndexOp : public MemOp
+{
+  protected:
+
+    /// Constructor
+    MemIndexOp(const char *mnem, MachInst _machInst, OpClass __opClass)
+      : MemOp(mnem, _machInst, __opClass)
     {
     }
 
-    std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+    std::string generateDisassembly(
+            Addr pc, const Loader::SymbolTable *symtab) const override;
 };
 
 } // namespace PowerISA