arch-power: Add fields for XS form instructions

[gem5.git] / src / arch / power / isa / bitfields.isa

diff --git a/src/arch/power/isa/bitfields.isa b/src/arch/power/isa/bitfields.isa
index 6cc67dd58fe7a6cb7f1c1088f6b10350620b351e..dfe4683dcf39964d7cd72fbb84e68e2af5fe402a 100644 (file)
--- a/src/arch/power/isa/bitfields.isa
+++ b/src/arch/power/isa/bitfields.isa
@@ -34,14 +34,22 @@
 // are reversed sometimes. Not sure of a fix to this though...
 
 // Opcode fields
-def bitfield OPCODE        <31:26>;
-def bitfield X_XO          <10:0>;
-def bitfield XO_XO         <10:1>;
+def bitfield PO            <31:26>;
 def bitfield A_XO          <5:1>;
+def bitfield DS_XO         <1:0>;
+def bitfield DX_XO         <5:1>;
+def bitfield VA_XO         <5:0>;
+def bitfield X_XO          <10:1>;
+def bitfield XFL_XO        <10:1>;
+def bitfield XFX_XO        <10:1>;
+def bitfield XL_XO         <10:1>;
+def bitfield XO_XO         <9:1>;
+def bitfield XS_XO         <10:2>;
 
 // Register fields
 def bitfield RA            <20:16>;
 def bitfield RB            <15:11>;
+def bitfield RC            <10:6>;
 def bitfield RS            <25:21>;
 def bitfield RT            <25:21>;
 def bitfield FRA           <20:16>;
@@ -65,6 +73,7 @@ def bitfield SPR           <20:11>;
 def bitfield FXM           <19:12>;
 
 // Branch fields
+def bitfield BO            <25:21>;
 def bitfield LK            <0>;
 def bitfield AA            <1>;