Source('floatregfile.cc')
Source('intregfile.cc')
Source('miscregfile.cc')
+ Source('pagetable.cc')
Source('regfile.cc')
Source('remote_gdb.cc')
+ Source('tlb.cc')
Source('utility.cc')
+ SimObject('SparcTLB.py')
+ TraceFlag('Sparc', "Generic SPARC ISA stuff")
+ TraceFlag('RegisterWindows', "Register window manipulation")
+
if env['FULL_SYSTEM']:
SimObject('SparcSystem.py')
- SimObject('SparcTLB.py')
+ SimObject('SparcInterrupts.py')
- Source('pagetable.cc')
+ Source('interrupts.cc')
Source('stacktrace.cc')
Source('system.cc')
- Source('tlb.cc')
Source('ua2005.cc')
Source('vtophys.cc')
else: