* Kevin Lim
*/
-#ifndef __ALPHA_FAULTS_HH__
-#define __ALPHA_FAULTS_HH__
+#ifndef __SPARC_FAULTS_HH__
+#define __SPARC_FAULTS_HH__
+#include "config/full_system.hh"
#include "sim/faults.hh"
// The design of the "name" and "vect" functions is in sim/faults.hh
typedef uint32_t TrapType;
typedef uint32_t FaultPriority;
+class ITB;
+
class SparcFaultBase : public FaultBase
{
public:
#if FULL_SYSTEM
void invoke(ThreadContext * tc);
#endif
- virtual FaultName name() = 0;
virtual TrapType trapType() = 0;
virtual FaultPriority priority() = 0;
virtual FaultStat & countStat() = 0;
protected:
static FaultVals vals;
public:
- FaultName name() {return vals.name;}
+ FaultName name() const {return vals.name;}
TrapType trapType() {return vals.trapType;}
FaultPriority priority() {return vals.priority;}
FaultStat & countStat() {return vals.count;}
public SparcFault<InternalProcessorError>
{
public:
- bool isMachineCheckFault() {return true;}
+ bool isMachineCheckFault() const {return true;}
};
class InstructionInvalidTSBEntry : public SparcFault<InstructionInvalidTSBEntry> {};
public SparcFault<MemAddressNotAligned>
{
public:
- bool isAlignmentFault() {return true;}
+ bool isAlignmentFault() const {return true;}
};
class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
class TrapLevelZero : public SparcFault<TrapLevelZero> {};
+class InterruptVector : public SparcFault<InterruptVector> {};
+
class PAWatchpoint : public SparcFault<PAWatchpoint> {};
class VAWatchpoint : public SparcFault<VAWatchpoint> {};
class FastInstructionAccessMMUMiss :
- public SparcFault<FastInstructionAccessMMUMiss> {};
+ public SparcFault<FastInstructionAccessMMUMiss>
+{
+#if !FULL_SYSTEM
+ protected:
+ Addr vaddr;
+ public:
+ FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
+ {}
+ void invoke(ThreadContext * tc);
+#endif
+};
-class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss> {};
+class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
+{
+#if !FULL_SYSTEM
+ protected:
+ Addr vaddr;
+ public:
+ FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
+ {}
+ void invoke(ThreadContext * tc);
+#endif
+};
class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
class DevMondo : public SparcFault<DevMondo> {};
-class ResumeableError : public SparcFault<ResumeableError> {};
+class ResumableError : public SparcFault<ResumableError> {};
class SpillNNormal : public EnumeratedFault<SpillNNormal>
{
class TrapInstruction : public EnumeratedFault<TrapInstruction>
{
-
public:
TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n) {;}
-};
-
+ //In SE, trap instructions are requesting services from the OS.
#if !FULL_SYSTEM
-class PageTableFault : public SparcFault<PageTableFault>
-{
- private:
- Addr vaddr;
- public:
- PageTableFault(Addr va) : vaddr(va) {}
void invoke(ThreadContext * tc);
-};
-
-static inline Fault genPageTableFault(Addr va)
-{
- return new PageTableFault(va);
-}
#endif
+};
static inline Fault genMachineCheckFault()
{
return new InternalProcessorError;
}
-static inline Fault genAlignmentFault()
-{
- return new MemAddressNotAligned;
-}
-
} // SparcISA namespace
-#endif // __FAULTS_HH__
+#endif // __SPARC_FAULTS_HH__