Merge with head.

[gem5.git] / src / arch / sparc / faults.hh

diff --git a/src/arch/sparc/faults.hh b/src/arch/sparc/faults.hh
index 10ef89279d0344425390786ea706f337c1381b56..20dd113c6214adb8d25fd353d7cfe03af4839e88 100644 (file)
--- a/src/arch/sparc/faults.hh
+++ b/src/arch/sparc/faults.hh
@@ -32,6 +32,7 @@
 #ifndef __SPARC_FAULTS_HH__
 #define __SPARC_FAULTS_HH__
 
+#include "config/full_system.hh"
 #include "sim/faults.hh"
 
 // The design of the "name" and "vect" functions is in sim/faults.hh
@@ -42,6 +43,8 @@ namespace SparcISA
 typedef uint32_t TrapType;
 typedef uint32_t FaultPriority;
 
+class ITB;
+
 class SparcFaultBase : public FaultBase
 {
   public:
@@ -65,7 +68,6 @@ class SparcFaultBase : public FaultBase
 #if FULL_SYSTEM
     void invoke(ThreadContext * tc);
 #endif
-    virtual FaultName name() = 0;
     virtual TrapType trapType() = 0;
     virtual FaultPriority priority() = 0;
     virtual FaultStat & countStat() = 0;
@@ -78,7 +80,7 @@ class SparcFault : public SparcFaultBase
   protected:
     static FaultVals vals;
   public:
-    FaultName name() {return vals.name;}
+    FaultName name() const {return vals.name;}
     TrapType trapType() {return vals.trapType;}
     FaultPriority priority() {return vals.priority;}
     FaultStat & countStat() {return vals.count;}
@@ -133,7 +135,7 @@ class InternalProcessorError :
     public SparcFault<InternalProcessorError>
 {
   public:
-    bool isMachineCheckFault() {return true;}
+    bool isMachineCheckFault() const {return true;}
 };
 
 class InstructionInvalidTSBEntry : public SparcFault<InstructionInvalidTSBEntry> {};
@@ -152,7 +154,7 @@ class MemAddressNotAligned :
     public SparcFault<MemAddressNotAligned>
 {
   public:
-    bool isAlignmentFault() {return true;}
+    bool isAlignmentFault() const {return true;}
 };
 
 class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
@@ -200,9 +202,29 @@ class PAWatchpoint : public SparcFault<PAWatchpoint> {};
 class VAWatchpoint : public SparcFault<VAWatchpoint> {};
 
 class FastInstructionAccessMMUMiss :
-    public SparcFault<FastInstructionAccessMMUMiss> {};
+    public SparcFault<FastInstructionAccessMMUMiss>
+{
+#if !FULL_SYSTEM
+  protected:
+    Addr vaddr;
+  public:
+    FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
+    {}
+    void invoke(ThreadContext * tc);
+#endif
+};
 
-class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss> {};
+class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
+{
+#if !FULL_SYSTEM
+  protected:
+    Addr vaddr;
+  public:
+    FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
+    {}
+    void invoke(ThreadContext * tc);
+#endif
+};
 
 class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
 
@@ -261,11 +283,6 @@ static inline Fault genMachineCheckFault()
     return new InternalProcessorError;
 }
 
-static inline Fault genAlignmentFault()
-{
-    return new MemAddressNotAligned;
-}
-
 
 } // SparcISA namespace