arch-arm: Add initial support for SVE contiguous loads/stores

[gem5.git] / src / arch / sparc / faults.hh

diff --git a/src/arch/sparc/faults.hh b/src/arch/sparc/faults.hh
index 2456ad28ad653d1f24b1ec81f8bcc6369b516aa5..2c44d51d45509bdf492b212aaf3c929b59dcee91 100644 (file)
--- a/src/arch/sparc/faults.hh
+++ b/src/arch/sparc/faults.hh
@@ -32,6 +32,7 @@
 #ifndef __SPARC_FAULTS_HH__
 #define __SPARC_FAULTS_HH__
 
+#include "cpu/static_inst.hh"
 #include "sim/faults.hh"
 
 // The design of the "name" and "vect" functions is in sim/faults.hh
@@ -42,6 +43,8 @@ namespace SparcISA
 typedef uint32_t TrapType;
 typedef uint32_t FaultPriority;
 
+class ITB;
+
 class SparcFaultBase : public FaultBase
 {
   public:
@@ -54,17 +57,22 @@ class SparcFaultBase : public FaultBase
         SH = -1,
         ShouldntHappen = SH
     };
+    using PrivilegeLevelSpec = std::array<PrivilegeLevel, NumLevels>;
     struct FaultVals
     {
         const FaultName name;
         const TrapType trapType;
         const FaultPriority priority;
-        const PrivilegeLevel nextPrivilegeLevel[NumLevels];
+        const PrivilegeLevelSpec nextPrivilegeLevel;
         FaultStat count;
+        FaultVals(const FaultName& name_, const TrapType& trapType_,
+                const FaultPriority& priority_, const PrivilegeLevelSpec& il)
+            : name(name_), trapType(trapType_), priority(priority_),
+            nextPrivilegeLevel(il)
+        {}
     };
-#if FULL_SYSTEM
-    void invoke(ThreadContext * tc);
-#endif
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
     virtual TrapType trapType() = 0;
     virtual FaultPriority priority() = 0;
     virtual FaultStat & countStat() = 0;
@@ -77,11 +85,13 @@ class SparcFault : public SparcFaultBase
   protected:
     static FaultVals vals;
   public:
-    FaultName name() const {return vals.name;}
-    TrapType trapType() {return vals.trapType;}
-    FaultPriority priority() {return vals.priority;}
-    FaultStat & countStat() {return vals.count;}
-    PrivilegeLevel getNextLevel(PrivilegeLevel current)
+    FaultName name() const { return vals.name; }
+    TrapType trapType() { return vals.trapType; }
+    FaultPriority priority() { return vals.priority; }
+    FaultStat & countStat() { return vals.count; }
+
+    PrivilegeLevel
+    getNextLevel(PrivilegeLevel current)
     {
         return vals.nextPrivilegeLevel[current];
     }
@@ -89,7 +99,8 @@ class SparcFault : public SparcFaultBase
 
 class PowerOnReset : public SparcFault<PowerOnReset>
 {
-    void invoke(ThreadContext * tc);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class WatchDogReset : public SparcFault<WatchDogReset> {};
@@ -104,7 +115,7 @@ class StoreError : public SparcFault<StoreError> {};
 
 class InstructionAccessException : public SparcFault<InstructionAccessException> {};
 
-//class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
+// class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
 
 class InstructionAccessError : public SparcFault<InstructionAccessError> {};
 
@@ -112,11 +123,12 @@ class IllegalInstruction : public SparcFault<IllegalInstruction> {};
 
 class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
 
-//class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
+// class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
 
-//class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
+// class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
 
 class FpDisabled : public SparcFault<FpDisabled> {};
+class VecDisabled : public SparcFault<VecDisabled> {};
 
 class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
 
@@ -129,30 +141,23 @@ class CleanWindow : public SparcFault<CleanWindow> {};
 class DivisionByZero : public SparcFault<DivisionByZero> {};
 
 class InternalProcessorError :
-    public SparcFault<InternalProcessorError>
-{
-  public:
-    bool isMachineCheckFault() const {return true;}
-};
+    public SparcFault<InternalProcessorError> {};
 
-class InstructionInvalidTSBEntry : public SparcFault<InstructionInvalidTSBEntry> {};
+class InstructionInvalidTSBEntry :
+    public SparcFault<InstructionInvalidTSBEntry> {};
 
 class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
 
 class DataAccessException : public SparcFault<DataAccessException> {};
 
-//class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
+// class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
 
 class DataAccessError : public SparcFault<DataAccessError> {};
 
 class DataAccessProtection : public SparcFault<DataAccessProtection> {};
 
 class MemAddressNotAligned :
-    public SparcFault<MemAddressNotAligned>
-{
-  public:
-    bool isAlignmentFault() const {return true;}
-};
+    public SparcFault<MemAddressNotAligned> {};
 
 class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
 
@@ -169,7 +174,7 @@ class InstructionRealTranslationMiss :
 
 class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
 
-//class AsyncDataError : public SparcFault<AsyncDataError> {};
+// class AsyncDataError : public SparcFault<AsyncDataError> {};
 
 template <class T>
 class EnumeratedFault : public SparcFault<T>
@@ -178,14 +183,14 @@ class EnumeratedFault : public SparcFault<T>
     uint32_t _n;
   public:
     EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
-    TrapType trapType() {return SparcFault<T>::trapType() + _n;}
+    TrapType trapType() { return SparcFault<T>::trapType() + _n; }
 };
 
 class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
 {
   public:
     InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
-    FaultPriority priority() {return 3200 - _n*100;}
+    FaultPriority priority() { return 3200 - _n*100; }
 };
 
 class HstickMatch : public SparcFault<HstickMatch> {};
@@ -199,9 +204,31 @@ class PAWatchpoint : public SparcFault<PAWatchpoint> {};
 class VAWatchpoint : public SparcFault<VAWatchpoint> {};
 
 class FastInstructionAccessMMUMiss :
-    public SparcFault<FastInstructionAccessMMUMiss> {};
+    public SparcFault<FastInstructionAccessMMUMiss>
+{
+  protected:
+    Addr vaddr;
+  public:
+    FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
+    {}
+    FastInstructionAccessMMUMiss() : vaddr(0)
+    {}
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
+};
 
-class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss> {};
+class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
+{
+  protected:
+    Addr vaddr;
+  public:
+    FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
+    {}
+    FastDataAccessMMUMiss() : vaddr(0)
+    {}
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
+};
 
 class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
 
@@ -217,55 +244,123 @@ class SpillNNormal : public EnumeratedFault<SpillNNormal>
 {
   public:
     SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
-    //These need to be handled specially to enable spill traps in SE
-#if !FULL_SYSTEM
-    void invoke(ThreadContext * tc);
-#endif
+    // These need to be handled specially to enable spill traps in SE
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class SpillNOther : public EnumeratedFault<SpillNOther>
 {
   public:
-    SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n) {;}
+    SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n)
+    {}
 };
 
 class FillNNormal : public EnumeratedFault<FillNNormal>
 {
   public:
-    FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n) {;}
-    //These need to be handled specially to enable fill traps in SE
-#if !FULL_SYSTEM
-    void invoke(ThreadContext * tc);
-#endif
+    FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n)
+    {}
+    // These need to be handled specially to enable fill traps in SE
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class FillNOther : public EnumeratedFault<FillNOther>
 {
   public:
-    FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n) {;}
+    FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n)
+    {}
 };
 
 class TrapInstruction : public EnumeratedFault<TrapInstruction>
 {
   public:
-    TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n) {;}
-    //In SE, trap instructions are requesting services from the OS.
-#if !FULL_SYSTEM
-    void invoke(ThreadContext * tc);
-#endif
+    TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n)
+    {}
+    // In SE, trap instructions are requesting services from the OS.
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
-static inline Fault genMachineCheckFault()
-{
-    return new InternalProcessorError;
-}
-
-static inline Fault genAlignmentFault()
-{
-    return new MemAddressNotAligned;
-}
-
-
-} // SparcISA namespace
+/*
+ * Explicitly declare template static member variables to avoid warnings
+ * in some clang versions
+ */
+template<> SparcFaultBase::FaultVals SparcFault<PowerOnReset>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<WatchDogReset>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<ExternallyInitiatedReset>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<SoftwareInitiatedReset>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<REDStateException>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<StoreError>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<InstructionAccessException>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<InstructionAccessError>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<IllegalInstruction>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<PrivilegedOpcode>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<FpDisabled>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<VecDisabled>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<FpExceptionIEEE754>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<FpExceptionOther>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<TagOverflow>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<CleanWindow>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<DivisionByZero>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<InternalProcessorError>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<InstructionInvalidTSBEntry>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<DataInvalidTSBEntry>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<DataAccessException>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<DataAccessError>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<DataAccessProtection>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<MemAddressNotAligned>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<LDDFMemAddressNotAligned>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<STDFMemAddressNotAligned>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<PrivilegedAction>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<LDQFMemAddressNotAligned>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<STQFMemAddressNotAligned>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<InstructionRealTranslationMiss>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<DataRealTranslationMiss>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<InterruptLevelN>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<HstickMatch>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<TrapLevelZero>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<InterruptVector>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<PAWatchpoint>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<VAWatchpoint>::vals;
+template<> SparcFaultBase::FaultVals
+    SparcFault<FastInstructionAccessMMUMiss>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<FastDataAccessMMUMiss>::vals;
+template<>
+     SparcFaultBase::FaultVals SparcFault<FastDataAccessProtection>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<InstructionBreakpoint>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<CpuMondo>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<DevMondo>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<ResumableError>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<SpillNNormal>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<SpillNOther>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<FillNNormal>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<FillNOther>::vals;
+template<> SparcFaultBase::FaultVals SparcFault<TrapInstruction>::vals;
+
+
+void enterREDState(ThreadContext *tc);
+
+void doREDFault(ThreadContext *tc, TrapType tt);
+
+void doNormalFault(ThreadContext *tc, TrapType tt, bool gotoHpriv);
+
+void getREDVector(RegVal TT, Addr &PC, Addr &NPC);
+
+void getHyperVector(ThreadContext * tc, Addr &PC, Addr &NPC, RegVal TT);
+
+void getPrivVector(ThreadContext *tc, Addr &PC, Addr &NPC, RegVal TT,
+                   RegVal TL);
+
+} // namespace SparcISA
 
 #endif // __SPARC_FAULTS_HH__