switch(width)
{
case SingleWidth:
- float32_t result32;
+ uint32_t result32;
+ float32_t fresult32;
memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
- result = htog(result32);
+ result32 = htog(result32);
+ memcpy(&fresult32, &result32, sizeof(result32));
+ result = fresult32;
+ DPRINTF(Sparc, "Read FP32 register %d = [%f]0x%x\n", floatReg, result, result32);
break;
case DoubleWidth:
- float64_t result64;
+ uint64_t result64;
+ float64_t fresult64;
memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
- result = htog(result64);
+ result64 = htog(result64);
+ memcpy(&fresult64, &result64, sizeof(result64));
+ result = fresult64;
+ DPRINTF(Sparc, "Read FP64 register %d = [%f]0x%x\n", floatReg, result, result64);
break;
case QuadWidth:
- float128_t result128;
- memcpy(&result128, regSpace + 4 * floatReg, sizeof(result128));
- result = htog(result128);
+ panic("Quad width FP not implemented.");
break;
default:
panic("Attempted to read a %d bit floating point register!", width);
uint32_t result32;
memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
result = htog(result32);
+ DPRINTF(Sparc, "Read FP32 bits register %d = 0x%x\n", floatReg, result);
break;
case DoubleWidth:
uint64_t result64;
memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
result = htog(result64);
+ DPRINTF(Sparc, "Read FP64 bits register %d = 0x%x\n", floatReg, result);
break;
case QuadWidth:
- uint64_t result128;
- memcpy(&result128, regSpace + 4 * floatReg, sizeof(result128));
- result = htog(result128);
+ panic("Quad width FP not implemented.");
break;
default:
panic("Attempted to read a %d bit floating point register!", width);
uint32_t result32;
uint64_t result64;
+ float32_t fresult32;
+ float64_t fresult64;
switch(width)
{
case SingleWidth:
- result32 = gtoh((uint32_t)val);
+ fresult32 = val;
+ memcpy(&result32, &fresult32, sizeof(result32));
+ result32 = gtoh(result32);
memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
+ DPRINTF(Sparc, "Write FP64 register %d = 0x%x\n", floatReg, result32);
break;
case DoubleWidth:
- result64 = gtoh((uint64_t)val);
+ fresult64 = val;
+ memcpy(&result64, &fresult64, sizeof(result64));
+ result64 = gtoh(result64);
memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
+ DPRINTF(Sparc, "Write FP64 register %d = 0x%x\n", floatReg, result64);
break;
case QuadWidth:
panic("Quad width FP not implemented.");
case SingleWidth:
result32 = gtoh((uint32_t)val);
memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
+ DPRINTF(Sparc, "Write FP64 bits register %d = 0x%x\n", floatReg, result32);
break;
case DoubleWidth:
result64 = gtoh((uint64_t)val);
memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
+ DPRINTF(Sparc, "Write FP64 bits register %d = 0x%x\n", floatReg, result64);
break;
case QuadWidth:
panic("Quad width FP not implemented.");
void FloatRegFile::serialize(std::ostream &os)
{
- SERIALIZE_ARRAY((unsigned char *)regSpace,
+ uint8_t *float_reg = (uint8_t*)regSpace;
+ SERIALIZE_ARRAY(float_reg,
SingleWidth / 8 * NumFloatRegs);
}
void FloatRegFile::unserialize(Checkpoint *cp, const std::string §ion)
{
- UNSERIALIZE_ARRAY((unsigned char *)regSpace,
+ uint8_t *float_reg = (uint8_t*)regSpace;
+ UNSERIALIZE_ARRAY(float_reg,
SingleWidth / 8 * NumFloatRegs);
}