syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.

[gem5.git] / src / arch / sparc / interrupts.hh

diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh
index 70838d1ce612d3a593a97c33c324c0e9b6cf1f9d..ec930e2b045776bb8bb3d8e32821e180bc084ebb 100644 (file)
--- a/src/arch/sparc/interrupts.hh
+++ b/src/arch/sparc/interrupts.hh
@@ -25,73 +25,186 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * Authors: Gabe Black
+ * Authors: Ali Saidi
+ *          Lisa Hsu
  */
 
 #ifndef __ARCH_SPARC_INTERRUPT_HH__
 #define __ARCH_SPARC_INTERRUPT_HH__
 
 #include "arch/sparc/faults.hh"
+#include "arch/sparc/isa_traits.hh"
+#include "cpu/thread_context.hh"
+#include "params/SparcInterrupts.hh"
+#include "sim/sim_object.hh"
 
 namespace SparcISA
 {
-    class Interrupts
+
+class Interrupts : public SimObject
+{
+  private:
+    BaseCPU * cpu;
+
+    uint64_t interrupts[NumInterruptTypes];
+    uint64_t intStatus;
+
+  public:
+
+    void
+    setCPU(BaseCPU * _cpu)
     {
-      protected:
-        Fault interrupts[NumInterruptLevels];
-        bool requested[NumInterruptLevels];
-
-      public:
-        Interrupts()
-        {
-            for(int x = 0; x < NumInterruptLevels; x++)
-            {
-                interrupts[x] = new InterruptLevelN(x);
-                requested[x] = false;
-            }
-        }
-        void post(int int_num, int index)
-        {
-            if(int_num < 0 || int_num >= NumInterruptLevels)
-                panic("int_num out of bounds\n");
+        cpu = _cpu;
+    }
 
-            requested[int_num] = true;
-        }
+    typedef SparcInterruptsParams Params;
 
-        void clear(int int_num, int index)
-        {
-            requested[int_num] = false;
-        }
+    const Params *
+    params() const
+    {
+        return dynamic_cast<const Params *>(_params);
+    }
 
-        void clear_all()
-        {
-            for(int x = 0; x < NumInterruptLevels; x++)
-                requested[x] = false;
-        }
+    Interrupts(Params * p) : SimObject(p), cpu(NULL)
+    {
+        clearAll();
+    }
 
-        bool check_interrupts(ThreadContext * tc) const
-        {
-            return true;
-        }
+    int
+    InterruptLevel(uint64_t softint)
+    {
+        if (softint & 0x10000 || softint & 0x1)
+            return 14;
 
-        Fault getInterrupt(ThreadContext * tc)
-        {
-            return NoFault;
-        }
+        int level = 15;
+        while (level > 0 && !(1 << level & softint))
+            level--;
+        if (1 << level & softint)
+            return level;
+        return 0;
+    }
 
-        void updateIntrInfo(ThreadContext * tc)
-        {
+    void
+    post(int int_num, int index)
+    {
+        DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
+        assert(int_num >= 0 && int_num < NumInterruptTypes);
+        assert(index >= 0 && index < 64);
 
-        }
+        interrupts[int_num] |= ULL(1) << index;
+        intStatus |= ULL(1) << int_num;
+    }
 
-        void serialize(std::ostream &os)
-        {
-        }
+    void
+    clear(int int_num, int index)
+    {
+        DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
+        assert(int_num >= 0 && int_num < NumInterruptTypes);
+        assert(index >= 0 && index < 64);
+
+        interrupts[int_num] &= ~(ULL(1) << index);
+        if (!interrupts[int_num])
+            intStatus &= ~(ULL(1) << int_num);
+    }
 
-        void unserialize(Checkpoint *cp, const std::string &section)
-        {
+    void
+    clearAll()
+    {
+        for (int i = 0; i < NumInterruptTypes; ++i) {
+            interrupts[i] = 0;
         }
-    };
-}
+        intStatus = 0;
+    }
+
+    bool
+    checkInterrupts(ThreadContext *tc) const
+    {
+        return intStatus;
+    }
+
+    Fault
+    getInterrupt(ThreadContext *tc)
+    {
+        int hpstate = tc->readMiscRegNoEffect(MISCREG_HPSTATE);
+        int pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
+        bool ie = pstate & PSTATE::ie;
+
+        // THESE ARE IN ORDER OF PRIORITY
+        // since there are early returns, and the highest
+        // priority interrupts should get serviced,
+        // it is v. important that new interrupts are inserted
+        // in the right order of processing
+        if (hpstate & HPSTATE::hpriv) {
+            if (ie) {
+                if (interrupts[IT_HINTP]) {
+                    // This will be cleaned by a HINTP write
+                    return new HstickMatch;
+                }
+                if (interrupts[IT_INT_VEC]) {
+                    // this will be cleared by an ASI read (or write)
+                    return new InterruptVector;
+                }
+            }
+        } else {
+            if (interrupts[IT_TRAP_LEVEL_ZERO]) {
+                    // this is cleared by deasserting HPSTATE::tlz
+                    return new TrapLevelZero;
+            }
+            // HStick matches always happen in priv mode (ie doesn't matter)
+            if (interrupts[IT_HINTP]) {
+                return new HstickMatch;
+            }
+            if (interrupts[IT_INT_VEC]) {
+                // this will be cleared by an ASI read (or write)
+                return new InterruptVector;
+            }
+            if (ie) {
+                if (interrupts[IT_CPU_MONDO]) {
+                    return new CpuMondo;
+                }
+                if (interrupts[IT_DEV_MONDO]) {
+                    return new DevMondo;
+                }
+                if (interrupts[IT_SOFT_INT]) {
+                    int level = InterruptLevel(interrupts[IT_SOFT_INT]);
+                    return new InterruptLevelN(level);
+                }
+
+                if (interrupts[IT_RES_ERROR]) {
+                    return new ResumableError;
+                }
+            } // !hpriv && ie
+        }  // !hpriv
+        return NoFault;
+    }
+
+    void
+    updateIntrInfo(ThreadContext *tc)
+    {
+
+    }
+
+    uint64_t
+    get_vec(int int_num)
+    {
+        assert(int_num >= 0 && int_num < NumInterruptTypes);
+        return interrupts[int_num];
+    }
+
+    void
+    serialize(std::ostream &os)
+    {
+        SERIALIZE_ARRAY(interrupts,NumInterruptTypes);
+        SERIALIZE_SCALAR(intStatus);
+    }
+
+    void
+    unserialize(Checkpoint *cp, const std::string &section)
+    {
+        UNSERIALIZE_ARRAY(interrupts,NumInterruptTypes);
+        UNSERIALIZE_SCALAR(intStatus);
+    }
+};
+} // namespace SPARC_ISA
 
 #endif // __ARCH_SPARC_INTERRUPT_HH__