Moved some constants from isa_traits.hh to the reg file headers.

[gem5.git] / src / arch / sparc / miscregfile.cc

diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc
index d9d7f44110b2a836041c19189bdb1eb22c0ca2de..9bbe9a5a07af9a5ab67c05abaefce80a470149eb 100644 (file)
--- a/src/arch/sparc/miscregfile.cc
+++ b/src/arch/sparc/miscregfile.cc
@@ -50,7 +50,7 @@ class Checkpoint;
 string SparcISA::getMiscRegName(RegIndex index)
 {
     static::string miscRegName[NumMiscRegs] =
-        {"y", "ccr", "asi", "tick", "pc", "fprs", "pcr", "pic",
+        {"y", "ccr", "asi", "tick", "fprs", "pcr", "pic",
          "gsr", "softint_set", "softint_clr", "softint", "tick_cmpr",
          "stick", "stick_cmpr",
          "tpc", "tnpc", "tstate", "tt", "privtick", "tba", "pstate", "tl",
@@ -62,6 +62,11 @@ string SparcISA::getMiscRegName(RegIndex index)
     return miscRegName[index];
 }
 
+enum RegMask
+{
+        PSTATE_MASK = (((1 << 4) - 1) << 1) | (((1 << 4) - 1) << 6) | (1 << 12)
+};
+
 void MiscRegFile::reset()
 {
     y = 0;
@@ -94,7 +99,8 @@ void MiscRegFile::reset()
     hintp = 0;
     htba = 0;
     hstick_cmpr = 0;
-    strandStatusReg = 0;
+    //This is set this way in Legion for some reason
+    strandStatusReg = 0x50000;
     fsr = 0;
     implicitInstAsi = ASI_PRIMARY;
     implicitDataAsi = ASI_PRIMARY;
@@ -274,7 +280,7 @@ void MiscRegFile::setReg(int miscReg, const MiscReg &val)
           tba = val & ULL(~0x7FFF);
           break;
         case MISCREG_PSTATE:
-          pstate = val;
+          pstate = (val & PSTATE_MASK);
           break;
         case MISCREG_TL:
           tl = val;
@@ -376,7 +382,7 @@ void MiscRegFile::setRegWithEffect(int miscReg,
           //Set up performance counting based on pcr value
           break;
         case MISCREG_PSTATE:
-          pstate = val;
+          pstate = val & PSTATE_MASK;
           setImplicitAsis();
           return;
         case MISCREG_TL: