X86: Define a noop ExtMachInst.

[gem5.git] / src / arch / sparc / nativetrace.cc

diff --git a/src/arch/sparc/nativetrace.cc b/src/arch/sparc/nativetrace.cc
index 6e894e8dfd1836978b81fd9d08cf2da04ce58ed0..02d4f4dbf1382a7462dd65df989c478d303dd301 100644 (file)
--- a/src/arch/sparc/nativetrace.cc
+++ b/src/arch/sparc/nativetrace.cc
@@ -36,7 +36,7 @@
 
 namespace Trace {
 
-static char *intRegNames[SparcISA::NumIntArchRegs] = {
+static const char *intRegNames[SparcISA::NumIntArchRegs] = {
     //Global registers
     "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
     //Output registers
@@ -58,7 +58,7 @@ Trace::SparcNativeTrace::check(NativeTraceRecord *record)
 
     // I doubt a real SPARC will describe more integer registers than this.
     assert(SparcISA::NumIntArchRegs == 32);
-    char **regName = intRegNames;
+    const char **regName = intRegNames;
     for (int i = 0; i < SparcISA::NumIntArchRegs; i++) {
         regVal = tc->readIntReg(i);
         read(&realRegVal, sizeof(realRegVal));