arch-arm: Add initial support for SVE contiguous loads/stores

[gem5.git] / src / arch / sparc / pagetable.cc

diff --git a/src/arch/sparc/pagetable.cc b/src/arch/sparc/pagetable.cc
index e91c0599f5d5c15aa49fb6f647e9e5713c35a6e3..0a14f0b80ff8bb9f7225343c72b03f6c38a79f0a 100644 (file)
--- a/src/arch/sparc/pagetable.cc
+++ b/src/arch/sparc/pagetable.cc
@@ -29,12 +29,14 @@
  */
 
 #include "arch/sparc/pagetable.hh"
+
 #include "sim/serialize.hh"
 
 namespace SparcISA
 {
+
 void
-TlbEntry::serialize(std::ostream &os)
+TlbEntry::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(range.va);
     SERIALIZE_SCALAR(range.size);
@@ -51,7 +53,7 @@ TlbEntry::serialize(std::ostream &os)
 
 
 void
-TlbEntry::unserialize(Checkpoint *cp, const std::string &section)
+TlbEntry::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(range.va);
     UNSERIALIZE_SCALAR(range.size);
@@ -67,8 +69,8 @@ TlbEntry::unserialize(Checkpoint *cp, const std::string &section)
 }
 
 
-int PageTableEntry::pageSizes[] = {8*1024, 64*1024, 0, 4*1024*1024, 0,
-            256*1024*1024L};
+int PageTableEntry::pageSizes[] =
+    { 8 * 1024, 64 * 1024, 0, 4 * 1024 * 1024, 0, 256 * 1024 * 1024L} ;
 
 
 }