arch-arm: Add initial support for SVE contiguous loads/stores

[gem5.git] / src / arch / sparc / pagetable.hh

diff --git a/src/arch/sparc/pagetable.hh b/src/arch/sparc/pagetable.hh
index ee4ca0c2c9d9d681a4697a0df4b7744b7be3bd2c..43a61259e25bbc07edd48137ed1560c2f96321ed 100644 (file)
--- a/src/arch/sparc/pagetable.hh
+++ b/src/arch/sparc/pagetable.hh
@@ -35,8 +35,7 @@
 
 #include "arch/sparc/isa_traits.hh"
 #include "base/bitfield.hh"
-#include "base/misc.hh"
-#include "config/full_system.hh"
+#include "base/logging.hh"
 
 class Checkpoint;
 
@@ -58,15 +57,15 @@ class TteTag
     TteTag(uint64_t e) : entry(e), populated(true) {}
 
     const TteTag &
-    operator=(uint64_t e) 
+    operator=(uint64_t e)
     {
         populated = true;
         entry = e;
         return *this;
     }
 
-    bool valid() const {assert(populated); return !bits(entry,62,62); }
-    Addr va()    const {assert(populated); return bits(entry,41,0); }
+    bool valid() const { assert(populated); return !bits(entry,62,62); }
+    Addr va()    const { assert(populated); return bits(entry,41,0); }
 };
 
 
@@ -86,8 +85,7 @@ class PageTableEntry
     bool populated;
 
   public:
-    PageTableEntry()
-        : entry(0), type(invalid), populated(false)
+    PageTableEntry() : entry(0), type(invalid), populated(false)
     {}
 
     PageTableEntry(uint64_t e, EntryType t = sun4u)
@@ -96,7 +94,8 @@ class PageTableEntry
         populate(entry, type);
     }
 
-    void populate(uint64_t e, EntryType t = sun4u)
+    void
+    populate(uint64_t e, EntryType t = sun4u)
     {
         entry = e;
         type = t;
@@ -107,18 +106,18 @@ class PageTableEntry
             entry4u = entry;
         else {
             entry4u = 0;
-            entry4u |= mbits(entry,63,63);         //valid
-            entry4u |= bits(entry,1,0) << 61;      //size[1:0]
-            entry4u |= bits(entry,62,62) << 60;    //nfo
-            entry4u |= bits(entry,12,12) << 59;    //ie
-            entry4u |= bits(entry,2,2) << 48;      //size[2]
-            entry4u |= mbits(entry,39,13);         //paddr
+            entry4u |= mbits(entry,63,63);         // valid
+            entry4u |= bits(entry,1,0) << 61;      // size[1:0]
+            entry4u |= bits(entry,62,62) << 60;    // nfo
+            entry4u |= bits(entry,12,12) << 59;    // ie
+            entry4u |= bits(entry,2,2) << 48;      // size[2]
+            entry4u |= mbits(entry,39,13);         // paddr
             entry4u |= bits(entry,61,61) << 6;;    // locked
-            entry4u |= bits(entry,10,10) << 5;     //cp
-            entry4u |= bits(entry,9,9) << 4;       //cv
-            entry4u |= bits(entry,11,11) << 3;     //e
-            entry4u |= bits(entry,8,8) << 2;       //p
-            entry4u |= bits(entry,6,6) << 1;       //w
+            entry4u |= bits(entry,10,10) << 5;     // cp
+            entry4u |= bits(entry,9,9) << 4;       // cv
+            entry4u |= bits(entry,11,11) << 3;     // e
+            entry4u |= bits(entry,8,8) << 2;       // p
+            entry4u |= bits(entry,6,6) << 1;       // w
         }
     }
 
@@ -131,6 +130,7 @@ class PageTableEntry
     static int pageSizes[6];
 
     uint64_t operator()() const { assert(populated); return entry4u; }
+
     const PageTableEntry &
     operator=(uint64_t e)
     {
@@ -230,14 +230,18 @@ struct TlbEntry
     TlbEntry()
     {}
 
-    TlbEntry(Addr asn, Addr vaddr, Addr paddr)
+    TlbEntry(Addr asn, Addr vaddr, Addr paddr,
+             bool uncacheable, bool read_only)
     {
         uint64_t entry = 0;
-        entry |= 1ULL << 1; // Writable
+        if (!read_only)
+            entry |= 1ULL << 1; // Writable
         entry |= 0ULL << 2; // Available in nonpriveleged mode
         entry |= 0ULL << 3; // No side effects
-        entry |= 1ULL << 4; // Virtually cachable
-        entry |= 1ULL << 5; // Physically cachable
+        if (!uncacheable) {
+            entry |= 1ULL << 4; // Virtually cachable
+            entry |= 1ULL << 5; // Physically cachable
+        }
         entry |= 0ULL << 6; // Not locked
         entry |= mbits(paddr, 39, 13); // Physical address
         entry |= 0ULL << 48; // size = 8k
@@ -261,13 +265,20 @@ struct TlbEntry
     bool used;
     bool valid;
 
-    Addr pageStart()
+    Addr
+    pageStart()
     {
         return pte.paddr();
     }
 
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void
+    updateVaddr(Addr new_vaddr)
+    {
+        range.va = new_vaddr;
+    }
+
+    void serialize(CheckpointOut &cp) const;
+    void unserialize(CheckpointIn &cp);
 };
 
 } // namespace SparcISA