*/
#include "arch/sparc/asi.hh"
+#include "arch/sparc/handlers.hh"
#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/process.hh"
#include "arch/sparc/types.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
+#include "sim/process_impl.hh"
#include "mem/translating_port.hh"
#include "sim/system.hh"
using namespace std;
using namespace SparcISA;
+static const int FirstArgumentReg = 8;
-SparcLiveProcess::SparcLiveProcess(const std::string &nm, ObjectFile *objFile,
- System *_system, int stdin_fd, int stdout_fd, int stderr_fd,
- std::vector<std::string> &argv, std::vector<std::string> &envp,
- const std::string &cwd,
- uint64_t _uid, uint64_t _euid, uint64_t _gid, uint64_t _egid,
- uint64_t _pid, uint64_t _ppid)
- : LiveProcess(nm, objFile, _system, stdin_fd, stdout_fd, stderr_fd,
- argv, envp, cwd, _uid, _euid, _gid, _egid, _pid, _ppid)
+
+SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
+ ObjectFile *objFile, Addr _StackBias)
+ : LiveProcess(params, objFile), StackBias(_StackBias)
{
// XXX all the below need to be updated for SPARC - Ali
brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
brk_point = roundUp(brk_point, VMPageSize);
- // Set up stack. On SPARC Linux, stack goes from the top of memory
- // downward, less the hole for the kernel address space.
- stack_base = (Addr)0x80000000000ULL;
-
- // Set up region for mmaps. Tru64 seems to start just above 0 and
- // grow up from there.
- mmap_start = mmap_end = 0xfffff80000000000ULL;
-
// Set pointer for next thread stack. Reserve 8M for main stack.
next_thread_stack_base = stack_base - (8 * 1024 * 1024);
spillStart = 0;
}
+void SparcLiveProcess::handleTrap(int trapNum, ThreadContext *tc)
+{
+ switch(trapNum)
+ {
+ case 0x01: //Software breakpoint
+ warn("Software breakpoint encountered at pc %#x.\n", tc->readPC());
+ break;
+ case 0x02: //Division by zero
+ warn("Software signaled a division by zero at pc %#x.\n",
+ tc->readPC());
+ break;
+ case 0x03: //Flush window trap
+ flushWindows(tc);
+ break;
+ case 0x04: //Clean windows
+ warn("Ignoring process request for clean register "
+ "windows at pc %#x.\n", tc->readPC());
+ break;
+ case 0x05: //Range check
+ warn("Software signaled a range check at pc %#x.\n",
+ tc->readPC());
+ break;
+ case 0x06: //Fix alignment
+ warn("Ignoring process request for os assisted unaligned accesses "
+ "at pc %#x.\n", tc->readPC());
+ break;
+ case 0x07: //Integer overflow
+ warn("Software signaled an integer overflow at pc %#x.\n",
+ tc->readPC());
+ break;
+ case 0x32: //Get integer condition codes
+ warn("Ignoring process request to get the integer condition codes "
+ "at pc %#x.\n", tc->readPC());
+ break;
+ case 0x33: //Set integer condition codes
+ warn("Ignoring process request to set the integer condition codes "
+ "at pc %#x.\n", tc->readPC());
+ break;
+ default:
+ panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
+ }
+}
+
void
SparcLiveProcess::startup()
{
- argsInit(sizeof(IntReg), VMPageSize);
+ Process::startup();
+ ThreadContext *tc = system->getThreadContext(contextIds[0]);
//From the SPARC ABI
- //The process runs in user mode
- threadContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE, 0x02);
-
//Setup default FP state
- threadContexts[0]->setMiscReg(MISCREG_FSR, 0);
+ tc->setMiscRegNoEffect(MISCREG_FSR, 0);
+
+ tc->setMiscRegNoEffect(MISCREG_TICK, 0);
- threadContexts[0]->setMiscReg(MISCREG_TICK, 0);
- //
/*
* Register window management registers
*/
//No windows contain info from other programs
- threadContexts[0]->setMiscReg(MISCREG_OTHERWIN, 0);
+ //tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
+ tc->setIntReg(NumIntArchRegs + 6, 0);
//There are no windows to pop
- threadContexts[0]->setMiscReg(MISCREG_CANRESTORE, 0);
+ //tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
+ tc->setIntReg(NumIntArchRegs + 4, 0);
//All windows are available to save into
- threadContexts[0]->setMiscReg(MISCREG_CANSAVE, NWindows - 2);
+ //tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
+ tc->setIntReg(NumIntArchRegs + 3, NWindows - 2);
//All windows are "clean"
- threadContexts[0]->setMiscReg(MISCREG_CLEANWIN, NWindows);
+ //tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
+ tc->setIntReg(NumIntArchRegs + 5, NWindows);
//Start with register window 0
- threadContexts[0]->setMiscReg(MISCREG_CWP, 0);
+ tc->setMiscRegNoEffect(MISCREG_CWP, 0);
//Always use spill and fill traps 0
- threadContexts[0]->setMiscReg(MISCREG_WSTATE, 0);
+ //tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
+ tc->setIntReg(NumIntArchRegs + 7, 0);
//Set the trap level to 0
- threadContexts[0]->setMiscReg(MISCREG_TL, 0);
+ tc->setMiscRegNoEffect(MISCREG_TL, 0);
//Set the ASI register to something fixed
- threadContexts[0]->setMiscReg(MISCREG_ASI, ASI_PRIMARY);
+ tc->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY);
+
+ /*
+ * T1 specific registers
+ */
+ //Turn on the icache, dcache, dtb translation, and itb translation.
+ tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
}
-m5_auxv_t buildAuxVect(int64_t type, int64_t val)
+void
+Sparc32LiveProcess::startup()
{
- m5_auxv_t result;
- result.a_type = TheISA::htog(type);
- result.a_val = TheISA::htog(val);
- return result;
-}
+ if (checkpointRestored)
+ return;
-//We only use 19 instructions for the trap handlers, but there would be
-//space for 32 in a real SPARC trap table.
-const int numFillInsts = 32;
-const int numSpillInsts = 32;
+ SparcLiveProcess::startup();
-MachInst fillHandler[numFillInsts] =
-{
- htog(0x87802018), //wr %g0, ASI_AIUP, %asi
- htog(0xe0dba7ff), //ldxa [%sp + BIAS + (0*8)] %asi, %l0
- htog(0xe2dba807), //ldxa [%sp + BIAS + (1*8)] %asi, %l1
- htog(0xe4dba80f), //ldxa [%sp + BIAS + (2*8)] %asi, %l2
- htog(0xe6dba817), //ldxa [%sp + BIAS + (3*8)] %asi, %l3
- htog(0xe8dba81f), //ldxa [%sp + BIAS + (4*8)] %asi, %l4
- htog(0xeadba827), //ldxa [%sp + BIAS + (5*8)] %asi, %l5
- htog(0xecdba82f), //ldxa [%sp + BIAS + (6*8)] %asi, %l6
- htog(0xeedba837), //ldxa [%sp + BIAS + (7*8)] %asi, %l7
- htog(0xf0dba83f), //ldxa [%sp + BIAS + (8*8)] %asi, %i0
- htog(0xf2dba847), //ldxa [%sp + BIAS + (9*8)] %asi, %i1
- htog(0xf4dba84f), //ldxa [%sp + BIAS + (10*8)] %asi, %i2
- htog(0xf6dba857), //ldxa [%sp + BIAS + (11*8)] %asi, %i3
- htog(0xf8dba85f), //ldxa [%sp + BIAS + (12*8)] %asi, %i4
- htog(0xfadba867), //ldxa [%sp + BIAS + (13*8)] %asi, %i5
- htog(0xfcdba86f), //ldxa [%sp + BIAS + (14*8)] %asi, %i6
- htog(0xfedba877), //ldxa [%sp + BIAS + (15*8)] %asi, %i7
- htog(0x83880000), //restored
- htog(0x83F00000), //retry
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000) //illtrap
-};
-
-MachInst spillHandler[numSpillInsts] =
+ ThreadContext *tc = system->getThreadContext(contextIds[0]);
+ //The process runs in user mode with 32 bit addresses
+ tc->setMiscReg(MISCREG_PSTATE, 0x0a);
+
+ argsInit(32 / 8, VMPageSize);
+}
+
+void
+Sparc64LiveProcess::startup()
{
- htog(0x87802018), //wr %g0, ASI_AIUP, %asi
- htog(0xe0f3a7ff), //stxa %l0, [%sp + BIAS + (0*8)] %asi
- htog(0xe2f3a807), //stxa %l1, [%sp + BIAS + (1*8)] %asi
- htog(0xe4f3a80f), //stxa %l2, [%sp + BIAS + (2*8)] %asi
- htog(0xe6f3a817), //stxa %l3, [%sp + BIAS + (3*8)] %asi
- htog(0xe8f3a81f), //stxa %l4, [%sp + BIAS + (4*8)] %asi
- htog(0xeaf3a827), //stxa %l5, [%sp + BIAS + (5*8)] %asi
- htog(0xecf3a82f), //stxa %l6, [%sp + BIAS + (6*8)] %asi
- htog(0xeef3a837), //stxa %l7, [%sp + BIAS + (7*8)] %asi
- htog(0xf0f3a83f), //stxa %i0, [%sp + BIAS + (8*8)] %asi
- htog(0xf2f3a847), //stxa %i1, [%sp + BIAS + (9*8)] %asi
- htog(0xf4f3a84f), //stxa %i2, [%sp + BIAS + (10*8)] %asi
- htog(0xf6f3a857), //stxa %i3, [%sp + BIAS + (11*8)] %asi
- htog(0xf8f3a85f), //stxa %i4, [%sp + BIAS + (12*8)] %asi
- htog(0xfaf3a867), //stxa %i5, [%sp + BIAS + (13*8)] %asi
- htog(0xfcf3a86f), //stxa %i6, [%sp + BIAS + (14*8)] %asi
- htog(0xfef3a877), //stxa %i7, [%sp + BIAS + (15*8)] %asi
- htog(0x81880000), //saved
- htog(0x83F00000), //retry
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000), //illtrap
- htog(0x00000000) //illtrap
-};
+ if (checkpointRestored)
+ return;
+
+ SparcLiveProcess::startup();
+
+ ThreadContext *tc = system->getThreadContext(contextIds[0]);
+ //The process runs in user mode
+ tc->setMiscReg(MISCREG_PSTATE, 0x02);
+ argsInit(sizeof(IntReg), VMPageSize);
+}
+
+template<class IntType>
void
-SparcLiveProcess::argsInit(int intSize, int pageSize)
+SparcLiveProcess::argsInit(int pageSize)
{
- Process::startup();
+ int intSize = sizeof(IntType);
+
+ typedef AuxVector<IntType> auxv_t;
+
+ std::vector<auxv_t> auxv;
string filename;
if(argv.size() < 1)
else
filename = argv[0];
- Addr alignmentMask = ~(intSize - 1);
+ //Even for a 32 bit process, the ABI says we still need to
+ //maintain double word alignment of the stack pointer.
+ uint64_t align = 16;
// load object file into target memory
objFile->loadSections(initVirtMem);
- //These are the auxilliary vector types
- enum auxTypes
- {
- SPARC_AT_HWCAP = 16,
- SPARC_AT_PAGESZ = 6,
- SPARC_AT_CLKTCK = 17,
- SPARC_AT_PHDR = 3,
- SPARC_AT_PHENT = 4,
- SPARC_AT_PHNUM = 5,
- SPARC_AT_BASE = 7,
- SPARC_AT_FLAGS = 8,
- SPARC_AT_ENTRY = 9,
- SPARC_AT_UID = 11,
- SPARC_AT_EUID = 12,
- SPARC_AT_GID = 13,
- SPARC_AT_EGID = 14,
- SPARC_AT_SECURE = 23
- };
-
enum hardwareCaps
{
M5_HWCAP_SPARC_FLUSH = 1,
M5_HWCAP_SPARC_V9 |
M5_HWCAP_SPARC_ULTRA3;
-
//Setup the auxilliary vectors. These will already have endian conversion.
//Auxilliary vectors are loaded only for elf formatted executables.
ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
if(elfObject)
{
//Bits which describe the system hardware capabilities
- auxv.push_back(buildAuxVect(SPARC_AT_HWCAP, hwcap));
+ auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
//The system page size
- auxv.push_back(buildAuxVect(SPARC_AT_PAGESZ, SparcISA::VMPageSize));
+ auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize));
//Defined to be 100 in the kernel source.
//Frequency at which times() increments
- auxv.push_back(buildAuxVect(SPARC_AT_CLKTCK, 100));
+ auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
// For statically linked executables, this is the virtual address of the
// program header tables if they appear in the executable image
- auxv.push_back(buildAuxVect(SPARC_AT_PHDR, elfObject->programHeaderTable()));
+ auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
// This is the size of a program header entry from the elf file.
- auxv.push_back(buildAuxVect(SPARC_AT_PHENT, elfObject->programHeaderSize()));
+ auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
// This is the number of program headers from the original elf file.
- auxv.push_back(buildAuxVect(SPARC_AT_PHNUM, elfObject->programHeaderCount()));
+ auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
//This is the address of the elf "interpreter", It should be set
//to 0 for regular executables. It should be something else
//(not sure what) for dynamic libraries.
- auxv.push_back(buildAuxVect(SPARC_AT_BASE, 0));
+ auxv.push_back(auxv_t(M5_AT_BASE, 0));
//This is hardwired to 0 in the elf loading code in the kernel
- auxv.push_back(buildAuxVect(SPARC_AT_FLAGS, 0));
+ auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
//The entry point to the program
- auxv.push_back(buildAuxVect(SPARC_AT_ENTRY, objFile->entryPoint()));
+ auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
//Different user and group IDs
- auxv.push_back(buildAuxVect(SPARC_AT_UID, uid()));
- auxv.push_back(buildAuxVect(SPARC_AT_EUID, euid()));
- auxv.push_back(buildAuxVect(SPARC_AT_GID, gid()));
- auxv.push_back(buildAuxVect(SPARC_AT_EGID, egid()));
+ auxv.push_back(auxv_t(M5_AT_UID, uid()));
+ auxv.push_back(auxv_t(M5_AT_EUID, euid()));
+ auxv.push_back(auxv_t(M5_AT_GID, gid()));
+ auxv.push_back(auxv_t(M5_AT_EGID, egid()));
//Whether to enable "secure mode" in the executable
- auxv.push_back(buildAuxVect(SPARC_AT_SECURE, 0));
+ auxv.push_back(auxv_t(M5_AT_SECURE, 0));
}
//Figure out how big the initial stack needs to be
- // The unaccounted for 0 at the top of the stack
- int mysterious_size = intSize;
+ // The unaccounted for 8 byte 0 at the top of the stack
+ int sentry_size = 8;
//This is the name of the file which is present on the initial stack
//It's purpose is to let the user space linker examine the original file.
arg_data_size += argv[i].size() + 1;
}
- //The info_block needs to be padded so it's size is a multiple of the
- //alignment mask. Also, it appears that there needs to be at least some
- //padding, so if the size is already a multiple, we need to increase it
- //anyway.
- int info_block_size =
- (file_name_size +
- env_data_size +
- arg_data_size +
- intSize) & alignmentMask;
-
- int info_block_padding =
- info_block_size -
- file_name_size -
- env_data_size -
- arg_data_size;
-
- //Each auxilliary vector is two 8 byte words
+ //The info_block.
+ int base_info_block_size =
+ sentry_size + file_name_size + env_data_size + arg_data_size;
+
+ int info_block_size = roundUp(base_info_block_size, align);
+
+ int info_block_padding = info_block_size - base_info_block_size;
+
+ //Each auxilliary vector is two words
int aux_array_size = intSize * 2 * (auxv.size() + 1);
int envp_array_size = intSize * (envp.size() + 1);
int argc_size = intSize;
int window_save_size = intSize * 16;
- int space_needed =
- mysterious_size +
- info_block_size +
+ //Figure out the size of the contents of the actual initial frame
+ int frame_size =
aux_array_size +
envp_array_size +
argv_array_size +
argc_size +
window_save_size;
+ //There needs to be padding after the auxiliary vector data so that the
+ //very bottom of the stack is aligned properly.
+ int aligned_partial_size = roundUp(frame_size, align);
+ int aux_padding = aligned_partial_size - frame_size;
+
+ int space_needed =
+ info_block_size +
+ aux_padding +
+ frame_size;
+
stack_min = stack_base - space_needed;
- stack_min &= alignmentMask;
+ stack_min = roundDown(stack_min, align);
stack_size = stack_base - stack_min;
- // map memory
+ // Allocate space for the stack
pTable->allocate(roundDown(stack_min, pageSize),
roundUp(stack_size, pageSize));
// map out initial stack contents
- Addr mysterious_base = stack_base - mysterious_size;
- Addr file_name_base = mysterious_base - file_name_size;
- Addr env_data_base = file_name_base - env_data_size;
- Addr arg_data_base = env_data_base - arg_data_size;
- Addr auxv_array_base = arg_data_base - aux_array_size - info_block_padding;
- Addr envp_array_base = auxv_array_base - envp_array_size;
- Addr argv_array_base = envp_array_base - argv_array_size;
- Addr argc_base = argv_array_base - argc_size;
-#ifndef NDEBUG
- // only used in DPRINTF
- Addr window_save_base = argc_base - window_save_size;
+ IntType sentry_base = stack_base - sentry_size;
+ IntType file_name_base = sentry_base - file_name_size;
+ IntType env_data_base = file_name_base - env_data_size;
+ IntType arg_data_base = env_data_base - arg_data_size;
+ IntType auxv_array_base = arg_data_base -
+ info_block_padding - aux_array_size - aux_padding;
+ IntType envp_array_base = auxv_array_base - envp_array_size;
+ IntType argv_array_base = envp_array_base - argv_array_size;
+ IntType argc_base = argv_array_base - argc_size;
+#if TRACING_ON
+ IntType window_save_base = argc_base - window_save_size;
#endif
- DPRINTF(Sparc, "The addresses of items on the initial stack:\n");
- DPRINTF(Sparc, "0x%x - file name\n", file_name_base);
- DPRINTF(Sparc, "0x%x - env data\n", env_data_base);
- DPRINTF(Sparc, "0x%x - arg data\n", arg_data_base);
- DPRINTF(Sparc, "0x%x - auxv array\n", auxv_array_base);
- DPRINTF(Sparc, "0x%x - envp array\n", envp_array_base);
- DPRINTF(Sparc, "0x%x - argv array\n", argv_array_base);
- DPRINTF(Sparc, "0x%x - argc \n", argc_base);
- DPRINTF(Sparc, "0x%x - window save\n", window_save_base);
- DPRINTF(Sparc, "0x%x - stack min\n", stack_min);
+ DPRINTF(Stack, "The addresses of items on the initial stack:\n");
+ DPRINTF(Stack, "%#x - sentry NULL\n", sentry_base);
+ DPRINTF(Stack, "filename = %s\n", filename);
+ DPRINTF(Stack, "%#x - file name\n", file_name_base);
+ DPRINTF(Stack, "%#x - env data\n", env_data_base);
+ DPRINTF(Stack, "%#x - arg data\n", arg_data_base);
+ DPRINTF(Stack, "%#x - auxv array\n", auxv_array_base);
+ DPRINTF(Stack, "%#x - envp array\n", envp_array_base);
+ DPRINTF(Stack, "%#x - argv array\n", argv_array_base);
+ DPRINTF(Stack, "%#x - argc \n", argc_base);
+ DPRINTF(Stack, "%#x - window save\n", window_save_base);
+ DPRINTF(Stack, "%#x - stack min\n", stack_min);
+
+ assert(window_save_base == stack_min);
// write contents to stack
// figure out argc
- uint64_t argc = argv.size();
- uint64_t guestArgc = TheISA::htog(argc);
+ IntType argc = argv.size();
+ IntType guestArgc = SparcISA::htog(argc);
- //Write out the mysterious 0
- uint64_t mysterious_zero = 0;
- initVirtMem->writeBlob(mysterious_base,
- (uint8_t*)&mysterious_zero, mysterious_size);
+ //Write out the sentry void *
+ uint64_t sentry_NULL = 0;
+ initVirtMem->writeBlob(sentry_base,
+ (uint8_t*)&sentry_NULL, sentry_size);
//Write the file name
initVirtMem->writeString(file_name_base, filename.c_str());
initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
(uint8_t*)&(auxv[x].a_val), intSize);
}
+
//Write out the terminating zeroed auxilliary vector
- const uint64_t zero = 0;
- initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
- (uint8_t*)&zero, 2 * intSize);
+ const IntType zero = 0;
+ initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
+ (uint8_t*)&zero, intSize);
+ initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
+ (uint8_t*)&zero, intSize);
copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
- //Stuff the trap handlers into the processes address space.
- //Since the stack grows down and is the highest area in the processes
- //address space, we can put stuff above it and stay out of the way.
- int fillSize = sizeof(MachInst) * numFillInsts;
- int spillSize = sizeof(MachInst) * numSpillInsts;
+ //Set up space for the trap handlers into the processes address space.
+ //Since the stack grows down and there is reserved address space abov
+ //it, we can put stuff above it and stay out of the way.
fillStart = stack_base;
- spillStart = fillStart + fillSize;
- initVirtMem->writeBlob(fillStart, (uint8_t*)fillHandler, fillSize);
- initVirtMem->writeBlob(spillStart, (uint8_t*)spillHandler, spillSize);
+ spillStart = fillStart + sizeof(MachInst) * numFillInsts;
+ ThreadContext *tc = system->getThreadContext(contextIds[0]);
//Set up the thread context to start running the process
- threadContexts[0]->setIntReg(ArgumentReg0, argc);
- threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
- threadContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
+ //assert(NumArgumentRegs >= 2);
+ //tc->setIntReg(ArgumentReg[0], argc);
+ //tc->setIntReg(ArgumentReg[1], argv_array_base);
+ tc->setIntReg(StackPointerReg, stack_min - StackBias);
+
+ // %g1 is a pointer to a function that should be run at exit. Since we
+ // don't have anything like that, it should be set to 0.
+ tc->setIntReg(1, 0);
Addr prog_entry = objFile->entryPoint();
- threadContexts[0]->setPC(prog_entry);
- threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
- threadContexts[0]->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
+ tc->setPC(prog_entry);
+ tc->setNextPC(prog_entry + sizeof(MachInst));
+ tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
+
+ //Align the "stack_min" to a page boundary.
+ stack_min = roundDown(stack_min, pageSize);
// num_processes++;
}
+
+void
+Sparc64LiveProcess::argsInit(int intSize, int pageSize)
+{
+ SparcLiveProcess::argsInit<uint64_t>(pageSize);
+
+ // Stuff the trap handlers into the process address space
+ initVirtMem->writeBlob(fillStart,
+ (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
+ initVirtMem->writeBlob(spillStart,
+ (uint8_t*)spillHandler64, sizeof(MachInst) * numSpillInsts);
+}
+
+void
+Sparc32LiveProcess::argsInit(int intSize, int pageSize)
+{
+ SparcLiveProcess::argsInit<uint32_t>(pageSize);
+
+ // Stuff the trap handlers into the process address space
+ initVirtMem->writeBlob(fillStart,
+ (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
+ initVirtMem->writeBlob(spillStart,
+ (uint8_t*)spillHandler32, sizeof(MachInst) * numSpillInsts);
+}
+
+void Sparc32LiveProcess::flushWindows(ThreadContext *tc)
+{
+ IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
+ IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
+ IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
+ MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
+ MiscReg origCWP = CWP;
+ CWP = (CWP + Cansave + 2) % NWindows;
+ while(NWindows - 2 - Cansave != 0)
+ {
+ if (Otherwin) {
+ panic("Otherwin non-zero.\n");
+ } else {
+ tc->setMiscReg(MISCREG_CWP, CWP);
+ //Do the stores
+ IntReg sp = tc->readIntReg(StackPointerReg);
+ for (int index = 16; index < 32; index++) {
+ uint32_t regVal = tc->readIntReg(index);
+ regVal = htog(regVal);
+ if (!tc->getMemPort()->tryWriteBlob(
+ sp + (index - 16) * 4, (uint8_t *)®Val, 4)) {
+ warn("Failed to save register to the stack when "
+ "flushing windows.\n");
+ }
+ }
+ Canrestore--;
+ Cansave++;
+ CWP = (CWP + 1) % NWindows;
+ }
+ }
+ tc->setIntReg(NumIntArchRegs + 3, Cansave);
+ tc->setIntReg(NumIntArchRegs + 4, Canrestore);
+ tc->setMiscReg(MISCREG_CWP, origCWP);
+}
+
+void Sparc64LiveProcess::flushWindows(ThreadContext *tc)
+{
+ IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
+ IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
+ IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
+ MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
+ MiscReg origCWP = CWP;
+ CWP = (CWP + Cansave + 2) % NWindows;
+ while(NWindows - 2 - Cansave != 0)
+ {
+ if (Otherwin) {
+ panic("Otherwin non-zero.\n");
+ } else {
+ tc->setMiscReg(MISCREG_CWP, CWP);
+ //Do the stores
+ IntReg sp = tc->readIntReg(StackPointerReg);
+ for (int index = 16; index < 32; index++) {
+ IntReg regVal = tc->readIntReg(index);
+ regVal = htog(regVal);
+ if (!tc->getMemPort()->tryWriteBlob(
+ sp + 2047 + (index - 16) * 8, (uint8_t *)®Val, 8)) {
+ warn("Failed to save register to the stack when "
+ "flushing windows.\n");
+ }
+ }
+ Canrestore--;
+ Cansave++;
+ CWP = (CWP + 1) % NWindows;
+ }
+ }
+ tc->setIntReg(NumIntArchRegs + 3, Cansave);
+ tc->setIntReg(NumIntArchRegs + 4, Canrestore);
+ tc->setMiscReg(MISCREG_CWP, origCWP);
+}
+
+IntReg
+Sparc32LiveProcess::getSyscallArg(ThreadContext *tc, int i)
+{
+ assert(i < 6);
+ return bits(tc->readIntReg(FirstArgumentReg + i), 31, 0);
+}
+
+void
+Sparc32LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val)
+{
+ assert(i < 6);
+ tc->setIntReg(FirstArgumentReg + i, bits(val, 31, 0));
+}
+
+IntReg
+Sparc64LiveProcess::getSyscallArg(ThreadContext *tc, int i)
+{
+ assert(i < 6);
+ return tc->readIntReg(FirstArgumentReg + i);
+}
+
+void
+Sparc64LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val)
+{
+ assert(i < 6);
+ tc->setIntReg(FirstArgumentReg + i, val);
+}
+
+void
+SparcLiveProcess::setSyscallReturn(ThreadContext *tc,
+ SyscallReturn return_value)
+{
+ // check for error condition. SPARC syscall convention is to
+ // indicate success/failure in reg the carry bit of the ccr
+ // and put the return value itself in the standard return value reg ().
+ if (return_value.successful()) {
+ // no error, clear XCC.C
+ tc->setIntReg(NumIntArchRegs + 2,
+ tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
+ //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) & 0xEE);
+ IntReg val = return_value.value();
+ if (bits(tc->readMiscRegNoEffect(
+ SparcISA::MISCREG_PSTATE), 3, 3)) {
+ val = bits(val, 31, 0);
+ }
+ tc->setIntReg(ReturnValueReg, val);
+ } else {
+ // got an error, set XCC.C
+ tc->setIntReg(NumIntArchRegs + 2,
+ tc->readIntReg(NumIntArchRegs + 2) | 0x11);
+ //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) | 0x11);
+ IntReg val = -return_value.value();
+ if (bits(tc->readMiscRegNoEffect(
+ SparcISA::MISCREG_PSTATE), 3, 3)) {
+ val = bits(val, 31, 0);
+ }
+ tc->setIntReg(ReturnValueReg, val);
+ }
+}