miscRegFile.clear();
}
-MiscReg RegFile::readMiscReg(int miscReg)
+MiscReg RegFile::readMiscRegNoEffect(int miscReg)
{
- return miscRegFile.readReg(miscReg);
+ return miscRegFile.readRegNoEffect(miscReg);
}
-MiscReg RegFile::readMiscRegWithEffect(int miscReg, ThreadContext *tc)
+MiscReg RegFile::readMiscReg(int miscReg, ThreadContext *tc)
{
- return miscRegFile.readRegWithEffect(miscReg, tc);
+ return miscRegFile.readReg(miscReg, tc);
}
-void RegFile::setMiscReg(int miscReg, const MiscReg &val)
+void RegFile::setMiscRegNoEffect(int miscReg, const MiscReg &val)
{
- miscRegFile.setReg(miscReg, val);
+ miscRegFile.setRegNoEffect(miscReg, val);
}
-void RegFile::setMiscRegWithEffect(int miscReg, const MiscReg &val,
+void RegFile::setMiscReg(int miscReg, const MiscReg &val,
ThreadContext * tc)
{
- miscRegFile.setRegWithEffect(miscReg, val, tc);
+ miscRegFile.setReg(miscReg, val, tc);
}
FloatReg RegFile::readFloatReg(int floatReg, int width)
int SparcISA::flattenIntIndex(ThreadContext * tc, int reg)
{
- int gl = tc->readMiscReg(MISCREG_GL);
- int cwp = tc->readMiscReg(MISCREG_CWP);
- //DPRINTF(Sparc, "Global Level = %d, Current Window Pointer = %d\n", gl, cwp);
+ int gl = tc->readMiscRegNoEffect(MISCREG_GL);
+ int cwp = tc->readMiscRegNoEffect(MISCREG_CWP);
+ //DPRINTF(RegisterWindows, "Global Level = %d, Current Window Pointer = %d\n", gl, cwp);
int newReg;
+ //The total number of global registers
+ int numGlobals = (MaxGL + 1) * 8;
if(reg < 8)
{
//Global register
{
//Regular windowed register
//Put it in the window pointed to by cwp
- newReg = MaxGL * 8 +
+ newReg = numGlobals +
((reg - 8 - cwp * 16 + NWindows * 16) % (NWindows * 16));
}
else if(reg < NumIntArchRegs + NumMicroIntRegs)
{
//Microcode register
//Displace from the end of the regular registers
- newReg = reg - NumIntArchRegs + MaxGL * 8 + NWindows * 16;
+ newReg = reg - NumIntArchRegs + numGlobals + NWindows * 16;
}
else if(reg < 2 * NumIntArchRegs + NumMicroIntRegs)
{
{
//Windowed register from the previous window
//Put it in the window before the one pointed to by cwp
- newReg = MaxGL * 8 +
+ newReg = numGlobals +
((reg - 8 - (cwp - 1) * 16 + NWindows * 16) % (NWindows * 16));
}
}
{
//Windowed register from the next window
//Put it in the window after the one pointed to by cwp
- newReg = MaxGL * 8 +
+ newReg = numGlobals +
((reg - 8 - (cwp + 1) * 16 + NWindows * 16) % (NWindows * 16));
}
}
else
panic("Tried to flatten invalid register index %d!\n", reg);
- DPRINTF(Sparc, "Flattened register %d to %d.\n", reg, newReg);
+ DPRINTF(RegisterWindows, "Flattened register %d to %d.\n", reg, newReg);
return newReg;
//return intRegFile.flattenIndex(reg);
}
-void RegFile::serialize(std::ostream &os)
+void
+RegFile::serialize(EventManager *em, ostream &os)
{
intRegFile.serialize(os);
floatRegFile.serialize(os);
- miscRegFile.serialize(os);
+ miscRegFile.serialize(em, os);
SERIALIZE_SCALAR(pc);
SERIALIZE_SCALAR(npc);
+ SERIALIZE_SCALAR(nnpc);
}
-void RegFile::unserialize(Checkpoint *cp, const std::string §ion)
+void
+RegFile::unserialize(EventManager *em, Checkpoint *cp, const string §ion)
{
intRegFile.unserialize(cp, section);
floatRegFile.unserialize(cp, section);
- miscRegFile.unserialize(cp, section);
+ miscRegFile.unserialize(em, cp, section);
UNSERIALIZE_SCALAR(pc);
UNSERIALIZE_SCALAR(npc);
-}
-
-void RegFile::changeContext(RegContextParam param, RegContextVal val)
-{
- switch(param)
- {
- case CONTEXT_CWP:
- intRegFile.setCWP(val);
- break;
- case CONTEXT_GLOBALS:
- intRegFile.setGlobals(val);
- break;
- default:
- panic("Tried to set illegal context parameter in the SPARC regfile.\n");
- }
-}
-
-int SparcISA::InterruptLevel(uint64_t softint)
-{
- if (softint & 0x10000 || softint & 0x1)
- return 14;
-
- int level = 14;
- while (level >= 0 && !(1 << (level + 1) & softint))
- level--;
- if (1 << (level + 1) & softint)
- return level;
- return 0;
+ UNSERIALIZE_SCALAR(nnpc);
}
void SparcISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
{
- uint8_t tl = src->readMiscReg(MISCREG_TL);
+ uint8_t tl = src->readMiscRegNoEffect(MISCREG_TL);
// Read all the trap level dependent registers and save them off
for(int i = 1; i <= MaxTL; i++)
{
- src->setMiscReg(MISCREG_TL, i);
- dest->setMiscReg(MISCREG_TL, i);
+ src->setMiscRegNoEffect(MISCREG_TL, i);
+ dest->setMiscRegNoEffect(MISCREG_TL, i);
- dest->setMiscReg(MISCREG_TT, src->readMiscReg(MISCREG_TT));
- dest->setMiscReg(MISCREG_TPC, src->readMiscReg(MISCREG_TPC));
- dest->setMiscReg(MISCREG_TNPC, src->readMiscReg(MISCREG_TNPC));
- dest->setMiscReg(MISCREG_TSTATE, src->readMiscReg(MISCREG_TSTATE));
+ dest->setMiscRegNoEffect(MISCREG_TT, src->readMiscRegNoEffect(MISCREG_TT));
+ dest->setMiscRegNoEffect(MISCREG_TPC, src->readMiscRegNoEffect(MISCREG_TPC));
+ dest->setMiscRegNoEffect(MISCREG_TNPC, src->readMiscRegNoEffect(MISCREG_TNPC));
+ dest->setMiscRegNoEffect(MISCREG_TSTATE, src->readMiscRegNoEffect(MISCREG_TSTATE));
}
// Save off the traplevel
- dest->setMiscReg(MISCREG_TL, tl);
- src->setMiscReg(MISCREG_TL, tl);
+ dest->setMiscRegNoEffect(MISCREG_TL, tl);
+ src->setMiscRegNoEffect(MISCREG_TL, tl);
// ASRs
-// dest->setMiscReg(MISCREG_Y, src->readMiscReg(MISCREG_Y));
-// dest->setMiscReg(MISCREG_CCR, src->readMiscReg(MISCREG_CCR));
- dest->setMiscReg(MISCREG_ASI, src->readMiscReg(MISCREG_ASI));
- dest->setMiscReg(MISCREG_TICK, src->readMiscReg(MISCREG_TICK));
- dest->setMiscReg(MISCREG_FPRS, src->readMiscReg(MISCREG_FPRS));
- dest->setMiscReg(MISCREG_SOFTINT, src->readMiscReg(MISCREG_SOFTINT));
- dest->setMiscReg(MISCREG_TICK_CMPR, src->readMiscReg(MISCREG_TICK_CMPR));
- dest->setMiscReg(MISCREG_STICK, src->readMiscReg(MISCREG_STICK));
- dest->setMiscReg(MISCREG_STICK_CMPR, src->readMiscReg(MISCREG_STICK_CMPR));
+// dest->setMiscRegNoEffect(MISCREG_Y, src->readMiscRegNoEffect(MISCREG_Y));
+// dest->setMiscRegNoEffect(MISCREG_CCR, src->readMiscRegNoEffect(MISCREG_CCR));
+ dest->setMiscRegNoEffect(MISCREG_ASI, src->readMiscRegNoEffect(MISCREG_ASI));
+ dest->setMiscRegNoEffect(MISCREG_TICK, src->readMiscRegNoEffect(MISCREG_TICK));
+ dest->setMiscRegNoEffect(MISCREG_FPRS, src->readMiscRegNoEffect(MISCREG_FPRS));
+ dest->setMiscRegNoEffect(MISCREG_SOFTINT, src->readMiscRegNoEffect(MISCREG_SOFTINT));
+ dest->setMiscRegNoEffect(MISCREG_TICK_CMPR, src->readMiscRegNoEffect(MISCREG_TICK_CMPR));
+ dest->setMiscRegNoEffect(MISCREG_STICK, src->readMiscRegNoEffect(MISCREG_STICK));
+ dest->setMiscRegNoEffect(MISCREG_STICK_CMPR, src->readMiscRegNoEffect(MISCREG_STICK_CMPR));
// Priv Registers
- dest->setMiscReg(MISCREG_TICK, src->readMiscReg(MISCREG_TICK));
- dest->setMiscReg(MISCREG_TBA, src->readMiscReg(MISCREG_TBA));
- dest->setMiscReg(MISCREG_PSTATE, src->readMiscReg(MISCREG_PSTATE));
- dest->setMiscReg(MISCREG_PIL, src->readMiscReg(MISCREG_PIL));
- dest->setMiscReg(MISCREG_CWP, src->readMiscReg(MISCREG_CWP));
-// dest->setMiscReg(MISCREG_CANSAVE, src->readMiscReg(MISCREG_CANSAVE));
-// dest->setMiscReg(MISCREG_CANRESTORE, src->readMiscReg(MISCREG_CANRESTORE));
-// dest->setMiscReg(MISCREG_OTHERWIN, src->readMiscReg(MISCREG_OTHERWIN));
-// dest->setMiscReg(MISCREG_CLEANWIN, src->readMiscReg(MISCREG_CLEANWIN));
-// dest->setMiscReg(MISCREG_WSTATE, src->readMiscReg(MISCREG_WSTATE));
- dest->setMiscReg(MISCREG_GL, src->readMiscReg(MISCREG_GL));
+ dest->setMiscRegNoEffect(MISCREG_TICK, src->readMiscRegNoEffect(MISCREG_TICK));
+ dest->setMiscRegNoEffect(MISCREG_TBA, src->readMiscRegNoEffect(MISCREG_TBA));
+ dest->setMiscRegNoEffect(MISCREG_PSTATE, src->readMiscRegNoEffect(MISCREG_PSTATE));
+ dest->setMiscRegNoEffect(MISCREG_PIL, src->readMiscRegNoEffect(MISCREG_PIL));
+ dest->setMiscRegNoEffect(MISCREG_CWP, src->readMiscRegNoEffect(MISCREG_CWP));
+// dest->setMiscRegNoEffect(MISCREG_CANSAVE, src->readMiscRegNoEffect(MISCREG_CANSAVE));
+// dest->setMiscRegNoEffect(MISCREG_CANRESTORE, src->readMiscRegNoEffect(MISCREG_CANRESTORE));
+// dest->setMiscRegNoEffect(MISCREG_OTHERWIN, src->readMiscRegNoEffect(MISCREG_OTHERWIN));
+// dest->setMiscRegNoEffect(MISCREG_CLEANWIN, src->readMiscRegNoEffect(MISCREG_CLEANWIN));
+// dest->setMiscRegNoEffect(MISCREG_WSTATE, src->readMiscRegNoEffect(MISCREG_WSTATE));
+ dest->setMiscRegNoEffect(MISCREG_GL, src->readMiscRegNoEffect(MISCREG_GL));
// Hyperprivilged registers
- dest->setMiscReg(MISCREG_HPSTATE, src->readMiscReg(MISCREG_HPSTATE));
- dest->setMiscReg(MISCREG_HINTP, src->readMiscReg(MISCREG_HINTP));
- dest->setMiscReg(MISCREG_HTBA, src->readMiscReg(MISCREG_HTBA));
- dest->setMiscReg(MISCREG_STRAND_STS_REG,
- src->readMiscReg(MISCREG_STRAND_STS_REG));
- dest->setMiscReg(MISCREG_HSTICK_CMPR,
- src->readMiscReg(MISCREG_HSTICK_CMPR));
+ dest->setMiscRegNoEffect(MISCREG_HPSTATE, src->readMiscRegNoEffect(MISCREG_HPSTATE));
+ dest->setMiscRegNoEffect(MISCREG_HINTP, src->readMiscRegNoEffect(MISCREG_HINTP));
+ dest->setMiscRegNoEffect(MISCREG_HTBA, src->readMiscRegNoEffect(MISCREG_HTBA));
+ dest->setMiscRegNoEffect(MISCREG_STRAND_STS_REG,
+ src->readMiscRegNoEffect(MISCREG_STRAND_STS_REG));
+ dest->setMiscRegNoEffect(MISCREG_HSTICK_CMPR,
+ src->readMiscRegNoEffect(MISCREG_HSTICK_CMPR));
// FSR
- dest->setMiscReg(MISCREG_FSR, src->readMiscReg(MISCREG_FSR));
+ dest->setMiscRegNoEffect(MISCREG_FSR, src->readMiscRegNoEffect(MISCREG_FSR));
+
+ //Strand Status Register
+ dest->setMiscRegNoEffect(MISCREG_STRAND_STS_REG,
+ src->readMiscRegNoEffect(MISCREG_STRAND_STS_REG));
+
+ // MMU Registers
+ dest->setMiscRegNoEffect(MISCREG_MMU_P_CONTEXT,
+ src->readMiscRegNoEffect(MISCREG_MMU_P_CONTEXT));
+ dest->setMiscRegNoEffect(MISCREG_MMU_S_CONTEXT,
+ src->readMiscRegNoEffect(MISCREG_MMU_S_CONTEXT));
+ dest->setMiscRegNoEffect(MISCREG_MMU_PART_ID,
+ src->readMiscRegNoEffect(MISCREG_MMU_PART_ID));
+ dest->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL,
+ src->readMiscRegNoEffect(MISCREG_MMU_LSU_CTRL));
+
+ // Scratchpad Registers
+ dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R0,
+ src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R0));
+ dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R1,
+ src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R1));
+ dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R2,
+ src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R2));
+ dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R3,
+ src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R3));
+ dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R4,
+ src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R4));
+ dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R5,
+ src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R5));
+ dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R6,
+ src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R6));
+ dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R7,
+ src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R7));
+
+ // Queue Registers
+ dest->setMiscRegNoEffect(MISCREG_QUEUE_CPU_MONDO_HEAD,
+ src->readMiscRegNoEffect(MISCREG_QUEUE_CPU_MONDO_HEAD));
+ dest->setMiscRegNoEffect(MISCREG_QUEUE_CPU_MONDO_TAIL,
+ src->readMiscRegNoEffect(MISCREG_QUEUE_CPU_MONDO_TAIL));
+ dest->setMiscRegNoEffect(MISCREG_QUEUE_DEV_MONDO_HEAD,
+ src->readMiscRegNoEffect(MISCREG_QUEUE_DEV_MONDO_HEAD));
+ dest->setMiscRegNoEffect(MISCREG_QUEUE_DEV_MONDO_TAIL,
+ src->readMiscRegNoEffect(MISCREG_QUEUE_DEV_MONDO_TAIL));
+ dest->setMiscRegNoEffect(MISCREG_QUEUE_RES_ERROR_HEAD,
+ src->readMiscRegNoEffect(MISCREG_QUEUE_RES_ERROR_HEAD));
+ dest->setMiscRegNoEffect(MISCREG_QUEUE_RES_ERROR_TAIL,
+ src->readMiscRegNoEffect(MISCREG_QUEUE_RES_ERROR_TAIL));
+ dest->setMiscRegNoEffect(MISCREG_QUEUE_NRES_ERROR_HEAD,
+ src->readMiscRegNoEffect(MISCREG_QUEUE_NRES_ERROR_HEAD));
+ dest->setMiscRegNoEffect(MISCREG_QUEUE_NRES_ERROR_TAIL,
+ src->readMiscRegNoEffect(MISCREG_QUEUE_NRES_ERROR_TAIL));
}
void SparcISA::copyRegs(ThreadContext *src, ThreadContext *dest)
{
- // First loop through the integer registers.
- for (int i = 0; i < TheISA::NumIntRegs; ++i) {
- dest->setIntReg(i, src->readIntReg(i));
+ //First loop through the integer registers.
+ int old_gl = src->readMiscRegNoEffect(MISCREG_GL);
+ int old_cwp = src->readMiscRegNoEffect(MISCREG_CWP);
+ //Globals
+ for (int x = 0; x < MaxGL; ++x) {
+ src->setMiscRegNoEffect(MISCREG_GL, x);
+ dest->setMiscRegNoEffect(MISCREG_GL, x);
+ for (int y = 0; y < 8; y++)
+ dest->setIntReg(y, src->readIntReg(y));
+ }
+ //Locals/Ins/Outs
+ for (int x = 0; x < NWindows; ++x) {
+ src->setMiscRegNoEffect(MISCREG_CWP, x);
+ dest->setMiscRegNoEffect(MISCREG_CWP, x);
+ for (int y = 8; y < 32; y++)
+ dest->setIntReg(y, src->readIntReg(y));
}
+ //MicroIntRegs
+ for (int y = 0; y < NumMicroIntRegs; ++y)
+ dest->setIntReg(y+32, src->readIntReg(y+32));
+
+ //Restore src's GL, CWP
+ src->setMiscRegNoEffect(MISCREG_GL, old_gl);
+ src->setMiscRegNoEffect(MISCREG_CWP, old_cwp);
+
// Then loop through the floating point registers.
- for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
+ for (int i = 0; i < SparcISA::NumFloatRegs; ++i) {
dest->setFloatRegBits(i, src->readFloatRegBits(i));
}
// Copy misc. registers
copyMiscRegs(src, dest);
+
// Lastly copy PC/NPC
dest->setPC(src->readPC());
dest->setNextPC(src->readNextPC());
dest->setNextNPC(src->readNextNPC());
}
+
projects / gem5.git / blobdiff