Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Inter...

[gem5.git] / src / arch / sparc / regfile.hh

diff --git a/src/arch/sparc/regfile.hh b/src/arch/sparc/regfile.hh
index f3e253f7ee89bb865195cd60854a00d8ed2c020c..da7e022e9c3cc6c3f6c38757c92572613287f711 100644 (file)
--- a/src/arch/sparc/regfile.hh
+++ b/src/arch/sparc/regfile.hh
@@ -48,8 +48,8 @@ namespace SparcISA
     class RegFile
     {
       protected:
-        Addr pc;               // Program Counter
-        Addr npc;              // Next Program Counter
+        Addr pc;                // Program Counter
+        Addr npc;               // Next Program Counter
         Addr nnpc;
 
       public:
@@ -63,9 +63,9 @@ namespace SparcISA
         void setNextNPC(Addr val);
 
       protected:
-        IntRegFile intRegFile;         // integer register file
-        FloatRegFile floatRegFile;     // floating point register file
-        MiscRegFile miscRegFile;       // control register file
+        IntRegFile intRegFile;          // integer register file
+        FloatRegFile floatRegFile;      // floating point register file
+        MiscRegFile miscRegFile;        // control register file
 
       public:
 
@@ -112,8 +112,9 @@ namespace SparcISA
 
         void setIntReg(int intReg, const IntReg &val);
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(EventManager *em, std::ostream &os);
+        void unserialize(EventManager *em, Checkpoint *cp,
+            const std::string &section);
 
       public:
 
@@ -122,6 +123,12 @@ namespace SparcISA
 
     int flattenIntIndex(ThreadContext * tc, int reg);
 
+    static inline int
+    flattenFloatIndex(ThreadContext * tc, int reg)
+    {
+        return reg;
+    }
+
     void copyRegs(ThreadContext *src, ThreadContext *dest);
 
     void copyMiscRegs(ThreadContext *src, ThreadContext *dest);