/*
+ * Copyright 2015 LabWare
+ * Copyright 2014 Google, Inc.
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* All rights reserved.
*
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
+ * Boris Shingarov
*/
/*
- * Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
+ * Copyright (c) 1990, 1993 The Regents of the University of California
+ * All rights reserved
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratories.
+ * This product includes software developed by the University of
+ * California, Lawrence Berkeley Laboratories.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
+ * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
*/
/*-
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* "Stub" to allow remote cpu to debug over a serial line using gdb.
*/
+#include "arch/sparc/remote_gdb.hh"
+
#include <sys/signal.h>
+#include <unistd.h>
+#include <csignal>
#include <string>
-#include <unistd.h>
#include "arch/vtophys.hh"
-#include "arch/sparc/remote_gdb.hh"
#include "base/intmath.hh"
#include "base/remote_gdb.hh"
#include "base/socket.hh"
#include "base/trace.hh"
-#include "config/full_system.hh"
-#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
+#include "debug/GDBAcc.hh"
+#include "debug/GDBRead.hh"
+#include "mem/page_table.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
+#include "sim/byteswap.hh"
+#include "sim/full_system.hh"
+#include "sim/process.hh"
#include "sim/system.hh"
using namespace std;
-using namespace TheISA;
+using namespace SparcISA;
-RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
- : BaseRemoteGDB(_system, c, NumGDBRegs)
+RemoteGDB::RemoteGDB(System *_system, ThreadContext *c, int _port)
+ : BaseRemoteGDB(_system, c, _port), regCache32(this), regCache64(this)
{}
///////////////////////////////////////////////////////////
// RemoteGDB::acc
//
-// Determine if the mapping at va..(va+len) is valid.
+// Determine if the mapping at va..(va+len) is valid.
//
bool
RemoteGDB::acc(Addr va, size_t len)
{
-#if 0
- Addr last_va;
-
- va = TheISA::TruncPage(va);
- last_va = TheISA::RoundPage(va + len);
-
- do {
- if (TheISA::IsK0Seg(va)) {
- if (va < (TheISA::K0SegBase + pmem->size())) {
- DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= "
- "%#x < K0SEG + size\n", va);
- return true;
- } else {
- DPRINTF(GDBAcc, "acc: Mapping invalid %#x > K0SEG + size\n",
- va);
- return false;
- }
- }
-
- /**
- * This code says that all accesses to palcode (instruction and data)
- * are valid since there isn't a va->pa mapping because palcode is
- * accessed physically. At some point this should probably be cleaned up
- * but there is no easy way to do it.
- */
-
- if (AlphaISA::PcPAL(va) || va < 0x10000)
- return true;
-
- Addr ptbr = context->readMiscReg(AlphaISA::IPR_PALtemp20);
- TheISA::PageTableEntry pte = TheISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va);
- if (!pte.valid()) {
- DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va);
- return false;
- }
- va += TheISA::PageBytes;
- } while (va < last_va);
-
- DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
-#endif
- return true;
+ //@Todo In NetBSD, this function checks if all addresses
+ // from va to va + len have valid page map entries. Not
+ // sure how this will work for other OSes or in general.
+ if (FullSystem) {
+ return va != 0;
+ } else {
+ // Check to make sure the first byte is mapped into the processes
+ // address space.
+ return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
+ }
}
-///////////////////////////////////////////////////////////
-// RemoteGDB::getregs
-//
-// Translate the kernel debugger register format into
-// the GDB register format.
void
-RemoteGDB::getregs()
+RemoteGDB::SPARCGdbRegCache::getRegs(ThreadContext *context)
{
- memset(gdbregs.regs, 0, gdbregs.size);
-
- gdbregs.regs[RegPc] = context->readPC();
- gdbregs.regs[RegNpc] = context->readNextPC();
- for(int x = RegG0; x <= RegI7; x++)
- gdbregs.regs[x] = context->readIntReg(x - RegG0);
- for(int x = RegF0; x <= RegF31; x++)
- gdbregs.regs[x] = context->readFloatRegBits(x - RegF0);
- gdbregs.regs[RegY] = context->readMiscReg(MISCREG_Y);
- //XXX need to also load up Psr, Wim, Tbr, Fpsr, and Cpsr
+ DPRINTF(GDBAcc, "getRegs in remotegdb \n");
+ for (int i = 0; i < 32; i++) r.gpr[i] = htobe((uint32_t)context->readIntReg(i));
+ PCState pc = context->pcState();
+ r.pc = htobe((uint32_t)pc.pc());
+ r.npc = htobe((uint32_t)pc.npc());
+ r.y = htobe((uint32_t)context->readIntReg(NumIntArchRegs + 1));
+ PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
+ r.psr = htobe((uint32_t)pstate);
+ r.fsr = htobe((uint32_t)context->readMiscReg(MISCREG_FSR));
+ r.csr = htobe((uint32_t)context->readIntReg(NumIntArchRegs + 2));
}
-///////////////////////////////////////////////////////////
-// RemoteGDB::setregs
-//
-// Translate the GDB register format into the kernel
-// debugger register format.
-//
void
-RemoteGDB::setregs()
+RemoteGDB::SPARC64GdbRegCache::getRegs(ThreadContext *context)
{
- context->setPC(gdbregs.regs[RegPc]);
- context->setNextPC(gdbregs.regs[RegNpc]);
- for(int x = RegG0; x <= RegI7; x++)
- context->setIntReg(x - RegG0, gdbregs.regs[x]);
- for(int x = RegF0; x <= RegF31; x++)
- context->setFloatRegBits(x - RegF0, gdbregs.regs[x]);
- context->setMiscRegWithEffect(MISCREG_Y, gdbregs.regs[RegY]);
- //XXX need to also set Psr, Wim, Tbr, Fpsr, and Cpsr
+ DPRINTF(GDBAcc, "getRegs in remotegdb \n");
+ for (int i = 0; i < 32; i++) r.gpr[i] = htobe(context->readIntReg(i));
+ for (int i = 0; i < 32; i++) r.fpr[i] = 0;
+ PCState pc = context->pcState();
+ r.pc = htobe(pc.pc());
+ r.npc = htobe(pc.npc());
+ r.fsr = htobe(context->readMiscReg(MISCREG_FSR));
+ r.fprs = htobe(context->readMiscReg(MISCREG_FPRS));
+ r.y = htobe(context->readIntReg(NumIntArchRegs + 1));
+ PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
+ r.state = htobe(
+ context->readMiscReg(MISCREG_CWP) |
+ pstate << 8 |
+ context->readMiscReg(MISCREG_ASI) << 24 |
+ context->readIntReg(NumIntArchRegs + 2) << 32);
}
void
-RemoteGDB::clearSingleStep()
+RemoteGDB::SPARCGdbRegCache::setRegs(ThreadContext *context) const
{
-#if 0
- DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n",
- takenBkpt.address, notTakenBkpt.address);
-
- if (takenBkpt.address != 0)
- clearTempBreakpoint(takenBkpt);
-
- if (notTakenBkpt.address != 0)
- clearTempBreakpoint(notTakenBkpt);
-#endif
+ for (int i = 0; i < 32; i++) context->setIntReg(i, r.gpr[i]);
+ PCState pc;
+ pc.pc(r.pc);
+ pc.npc(r.npc);
+ pc.nnpc(pc.npc() + sizeof(MachInst));
+ pc.upc(0);
+ pc.nupc(1);
+ context->pcState(pc);
+ // Floating point registers are left at 0 in netbsd
+ // All registers other than the pc, npc and int regs
+ // are ignored as well.
}
void
-RemoteGDB::setSingleStep()
+RemoteGDB::SPARC64GdbRegCache::setRegs(ThreadContext *context) const
{
-#if 0
- Addr pc = context->readPC();
- Addr npc, bpc;
- bool set_bt = false;
+ for (int i = 0; i < 32; i++) context->setIntReg(i, r.gpr[i]);
+ PCState pc;
+ pc.pc(r.pc);
+ pc.npc(r.npc);
+ pc.nnpc(pc.npc() + sizeof(MachInst));
+ pc.upc(0);
+ pc.nupc(1);
+ context->pcState(pc);
+ // Floating point registers are left at 0 in netbsd
+ // All registers other than the pc, npc and int regs
+ // are ignored as well.
+}
- npc = pc + sizeof(MachInst);
- // User was stopped at pc, e.g. the instruction at pc was not
- // executed.
- MachInst inst = read<MachInst>(pc);
- StaticInstPtr si(inst);
- if (si->hasBranchTarget(pc, context, bpc)) {
- // Don't bother setting a breakpoint on the taken branch if it
- // is the same as the next pc
- if (bpc != npc)
- set_bt = true;
+BaseGdbRegCache*
+RemoteGDB::gdbRegs()
+{
+ PSTATE pstate = context()->readMiscReg(MISCREG_PSTATE);
+ if (pstate.am) {
+ return ®Cache32;
+ } else {
+ return ®Cache64;
}
-
- DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n",
- takenBkpt.address, notTakenBkpt.address);
-
- setTempBreakpoint(notTakenBkpt, npc);
-
- if (set_bt)
- setTempBreakpoint(takenBkpt, bpc);
-#endif
}
projects / gem5.git / blobdiff