mem: update stuff for changes to Packet and Request

[gem5.git] / src / arch / sparc / tlb.cc

diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index b6a450ffe8c86c80353fa3ca91e5917837d53c43..875ae1411e654ad8dff01a18604a21ecd425ef16 100644 (file)
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -594,7 +594,7 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write)
                     (!write || ce->pte.writable())) {
                     req->setPaddr(ce->pte.translate(vaddr));
                     if (ce->pte.sideffect() || (ce->pte.paddr() >> 39) & 1)
-                        req->setFlags(req->getFlags() | UNCACHEABLE);
+                        req->setFlags(Request::UNCACHEABLE);
                     DPRINTF(TLB, "TLB: %#X -> %#X\n", vaddr, req->getPaddr());
                     return NoFault;
                 } // if matched
@@ -607,7 +607,7 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write)
                     (!write || ce->pte.writable())) {
                     req->setPaddr(ce->pte.translate(vaddr));
                     if (ce->pte.sideffect() || (ce->pte.paddr() >> 39) & 1)
-                        req->setFlags(req->getFlags() | UNCACHEABLE);
+                        req->setFlags(Request::UNCACHEABLE);
                     DPRINTF(TLB, "TLB: %#X -> %#X\n", vaddr, req->getPaddr());
                     return NoFault;
                 } // if matched
@@ -769,7 +769,7 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write)
     }
 
     if (e->pte.sideffect() || (e->pte.paddr() >> 39) & 1)
-        req->setFlags(req->getFlags() | UNCACHEABLE);
+        req->setFlags(Request::UNCACHEABLE);
 
     // cache translation date for next translation
     cacheState = tlbdata;