if env['TARGET_ISA'] == 'x86':
Source('cpuid.cc')
Source('emulenv.cc')
- Source('floatregfile.cc')
Source('faults.cc')
Source('insts/microfpop.cc')
Source('insts/microldstop.cc')
+ Source('insts/micromediaop.cc')
Source('insts/microop.cc')
Source('insts/microregop.cc')
Source('insts/static_inst.cc')
- Source('intregfile.cc')
- Source('miscregfile.cc')
+ Source('isa.cc')
+ Source('nativetrace.cc')
Source('pagetable.cc')
Source('predecoder.cc')
Source('predecoder_tables.cc')
- Source('regfile.cc')
Source('remote_gdb.cc')
Source('tlb.cc')
Source('utility.cc')
+ SimObject('X86NativeTrace.py')
+
SimObject('X86TLB.py')
- TraceFlag('Predecoder')
- TraceFlag('X86')
+ TraceFlag('Predecoder', "Predecoder debug output")
+ TraceFlag('X86', "Generic X86 ISA debugging")
if env['FULL_SYSTEM']:
- TraceFlag('LocalApic')
+ TraceFlag('LocalApic', "Local APIC debugging")
+ TraceFlag('PageTableWalker', \
+ "Page table walker state machine debugging")
+ TraceFlag('Faults', "Trace all faults/exceptions/traps")
SimObject('X86LocalApic.py')
SimObject('X86System.py')
'general_purpose/system_calls.py',
'romutil.py',
'system/__init__.py',
+ 'system/control_registers.py',
'system/halt.py',
'system/invlpg.py',
'system/undefined_operation.py',
# Only non-header files need to be compiled.
if not f.path.endswith('.hh'):
Source(f)
-
- # Workaround for bug in SCons version > 0.97d20071212
- # Scons bug id: 2006 M5 Bug id: 308
- from os.path import dirname, join as joinpath
-
- Dir('isa')
- Dir('isa/microops')
- Dir('isa/decoder')
- Dir('isa/formats')
- Dir('isa/insts')
- isa_dirs = set(map(lambda x:dirname(x), python_files))
- for d in isa_dirs:
- Dir(joinpath('isa/insts', d))
-