misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB

[gem5.git] / src / arch / x86 / X86MMU.py

diff --git a/src/arch/x86/X86MMU.py b/src/arch/x86/X86MMU.py
index ee30b5fbd8f4b8261ef1920ff314cae2c6bf7049..fc77d5b57aa3af372acf264840fc4a5dae6ae2e1 100644 (file)
--- a/src/arch/x86/X86MMU.py
+++ b/src/arch/x86/X86MMU.py
@@ -44,3 +44,11 @@ class X86MMU(BaseMMU):
     cxx_header = 'arch/x86/mmu.hh'
     itb = X86TLB()
     dtb = X86TLB()
+
+    @classmethod
+    def walkerPorts(cls):
+        return ["mmu.itb.walker.port", "mmu.dtb.walker.port"]
+
+    def connectWalkerPorts(self, iport, dport):
+        self.itb.walker.port = iport
+        self.dtb.walker.port = dport