# Copyright (c) 2007 The Hewlett-Packard Development Company
# All rights reserved.
#
-# Redistribution and use of this software in source and binary forms,
-# with or without modification, are permitted provided that the
-# following conditions are met:
+# The license below extends only to copyright in the software and shall
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+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
#
-# The software must be used only for Non-Commercial Use which means any
-# use which is NOT directed to receiving any direct monetary
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-# Office of Strategy and Technology
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+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
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+# redistributions in binary form must reproduce the above copyright
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-# this software without specific prior written permission. No right of
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+# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
#
# Authors: Gabe Black
-from MemObject import MemObject
+from m5.defines import buildEnv
from m5.params import *
+from m5.proxy import *
-class X86TLB(MemObject):
- type = 'X86TLB'
- abstract = True
- size = Param.Int("TLB size")
- walker_port = Port("Port for the hardware table walker")
- system = Param.System(Parent.any, "system object")
-
-class X86DTB(X86TLB):
- type = 'X86DTB'
- cxx_namespace = 'X86ISA'
- cxx_class = 'DTB'
-
- size = 64
+from BaseTLB import BaseTLB
+from MemObject import MemObject
-class X86ITB(X86TLB):
- type = 'X86ITB'
- cxx_namespace = 'X86ISA'
- cxx_class = 'ITB'
+if buildEnv['FULL_SYSTEM']:
+ class X86PagetableWalker(MemObject):
+ type = 'X86PagetableWalker'
+ cxx_class = 'X86ISA::Walker'
+ port = Port("Port for the hardware table walker")
+ system = Param.System(Parent.any, "system object")
- size = 64
+class X86TLB(BaseTLB):
+ type = 'X86TLB'
+ cxx_class = 'X86ISA::TLB'
+ size = Param.Int(64, "TLB size")
+ if buildEnv['FULL_SYSTEM']:
+ walker = Param.X86PagetableWalker(\
+ X86PagetableWalker(), "page table walker")