X86: Compute PCI config addresses correctly.

[gem5.git] / src / arch / x86 / insts / static_inst.cc

diff --git a/src/arch/x86/insts/static_inst.cc b/src/arch/x86/insts/static_inst.cc
index 183700fa9a9bd73a16ce829c2d5a92d0ac0c98a7..f4ed446036a8f3032d6ae171cfc62c11288c66a6 100644 (file)
--- a/src/arch/x86/insts/static_inst.cc
+++ b/src/arch/x86/insts/static_inst.cc
@@ -63,13 +63,13 @@ namespace X86ISA
     void X86StaticInst::printMnemonic(std::ostream &os,
             const char * mnemonic) const
     {
-        ccprintf(os, "\t%s   ", mnemonic);
+        ccprintf(os, "  %s   ", mnemonic);
     }
 
     void X86StaticInst::printMnemonic(std::ostream &os,
             const char * instMnemonic, const char * mnemonic) const
     {
-        ccprintf(os, "\t%s : %s   ", instMnemonic, mnemonic);
+        ccprintf(os, "  %s : %s   ", instMnemonic, mnemonic);
     }
 
     void X86StaticInst::printSegment(std::ostream &os, int segment) const
@@ -94,8 +94,26 @@ namespace X86ISA
           case SEGMENT_REG_GS:
             ccprintf(os, "GS");
             break;
-          case SEGMENT_REG_INT:
-            ccprintf(os, "INT");
+          case SEGMENT_REG_HS:
+            ccprintf(os, "HS");
+            break;
+          case SEGMENT_REG_TSL:
+            ccprintf(os, "TSL");
+            break;
+          case SEGMENT_REG_TSG:
+            ccprintf(os, "TSG");
+            break;
+          case SEGMENT_REG_LS:
+            ccprintf(os, "LS");
+            break;
+          case SEGMENT_REG_MS:
+            ccprintf(os, "MS");
+            break;
+          case SYS_SEGMENT_REG_TR:
+            ccprintf(os, "TR");
+            break;
+          case SYS_SEGMENT_REG_IDTR:
+            ccprintf(os, "IDTR");
             break;
           default:
             panic("Unrecognized segment %d\n", segment);
@@ -222,6 +240,44 @@ namespace X86ISA
         }
     }
 
+    void X86StaticInst::printMem(std::ostream &os, uint8_t segment,
+            uint8_t scale, RegIndex index, RegIndex base,
+            uint64_t disp, uint8_t addressSize, bool rip) const
+    {
+        bool someAddr = false;
+        printSegment(os, segment);
+        os << ":[";
+        if (rip) {
+            os << "rip";
+            someAddr = true;
+        } else {
+            if (scale != 0 && index != ZeroReg)
+            {
+                if(scale != 1)
+                    ccprintf(os, "%d*", scale);
+                printReg(os, index, addressSize);
+                someAddr = true;
+            }
+            if (base != ZeroReg)
+            {
+                if(someAddr)
+                    os << " + ";
+                printReg(os, base, addressSize);
+                someAddr = true;
+            }
+        }
+        if (disp != 0)
+        {
+            if(someAddr)
+                os << " + ";
+            ccprintf(os, "%#x", disp);
+            someAddr = true;
+        }
+        if (!someAddr)
+            os << "0";
+        os << "]";
+    }
+
     std::string X86StaticInst::generateDisassembly(Addr pc,
         const SymbolTable *symtab) const
     {