x86: logSize and lruSeq are now optional ckpt params

[gem5.git] / src / arch / x86 / interrupts.cc

diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 55b5bdca97f3a34b620649b7dce861f495c8ddea..b418a7489bd4e8d5c9a9ad2a074d69a3cbd9de68 100644 (file)
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2008 The Hewlett-Packard Development Company
  * All rights reserved.
  *
@@ -47,6 +59,7 @@
 #include "dev/x86/south_bridge.hh"
 #include "mem/packet_access.hh"
 #include "sim/system.hh"
+#include "sim/full_system.hh"
 
 int
 divideFromConf(uint32_t conf)
@@ -274,9 +287,8 @@ X86ISA::Interrupts::requestInterrupt(uint8_t vector,
             startupVector = vector;
         }
     }
-#if FULL_SYSTEM //XXX CPU has no wakeup method in SE mode.
-    cpu->wakeup();
-#endif
+    if (FullSystem)
+        cpu->wakeup();
 }
 
 
@@ -291,6 +303,7 @@ X86ISA::Interrupts::setCPU(BaseCPU * newCPU)
     cpu = newCPU;
     initialApicId = cpu->cpuId();
     regs[APIC_ID] = (initialApicId << 24);
+    pioAddr = x86LocalAPICAddress(initialApicId, 0);
 }
 
 
@@ -304,11 +317,9 @@ X86ISA::Interrupts::init()
     //
     BasicPioDevice::init();
     IntDev::init();
-#if FULL_SYSTEM
-    Pc * pc = dynamic_cast<Pc *>(platform);
-    assert(pc);
-    pc->southBridge->ioApic->registerLocalApic(initialApicId, this);
-#endif
+
+    // the slave port has a range so inform the connected master
+    intSlavePort.sendRangeChange();
 }
 
 
@@ -356,25 +367,26 @@ X86ISA::Interrupts::recvResponse(PacketPtr pkt)
 }
 
 
-void
-X86ISA::Interrupts::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+X86ISA::Interrupts::getAddrRanges() const
 {
-    range_list.clear();
+    AddrRangeList ranges;
     Range<Addr> range = RangeEx(x86LocalAPICAddress(initialApicId, 0),
                                 x86LocalAPICAddress(initialApicId, 0) + 
                                 PageBytes);
-    range_list.push_back(range);
-    pioAddr = range.start;
+    ranges.push_back(range);
+    return ranges;
 }
 
 
-void
-X86ISA::Interrupts::getIntAddrRange(AddrRangeList &range_list)
+AddrRangeList
+X86ISA::Interrupts::getIntAddrRange() const
 {
-    range_list.clear();
-    range_list.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
-                x86InterruptAddress(initialApicId, 0) +
-                PhysAddrAPICRangeSize));
+    AddrRangeList ranges;
+    ranges.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
+                             x86InterruptAddress(initialApicId, 0) +
+                             PhysAddrAPICRangeSize));
+    return ranges;
 }
 
 
@@ -557,7 +569,7 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val)
                 break;
             }
             pendingIPIs += apics.size();
-            intPort->sendMessage(apics, message, timing);
+            intMasterPort.sendMessage(apics, message, timing);
             newVal = regs[APIC_INTERRUPT_COMMAND_LOW];
         }
         break;
@@ -615,10 +627,8 @@ X86ISA::Interrupts::Interrupts(Params * p) :
     pendingInit(false), initVector(0),
     pendingStartup(false), startupVector(0),
     startedUp(false), pendingUnmaskableInt(false),
-    pendingIPIs(0), cpu(NULL)
-#if FULL_SYSTEM
-    , platform(p->platform)
-#endif
+    pendingIPIs(0), cpu(NULL),
+    intSlavePort(name() + ".int_slave", this, this, latency)
 {
     pioSize = PageBytes;
     memset(regs, 0, sizeof(regs));