X86: Implement the media floating point max instructions.
[gem5.git] / src / arch / x86 / intregs.hh
index 1b5777f01f0008a5203aab133647d1f5c4ce6d8b..2c6d871edc5d43c7a88a95390870cd9a2ceb6e70 100644 (file)
 #ifndef __ARCH_X86_INTREGS_HH__
 #define __ARCH_X86_INTREGS_HH__
 
+#include "arch/x86/x86_traits.hh"
+#include "base/bitunion.hh"
+#include "base/misc.hh"
+#include "sim/core.hh"
+
 namespace X86ISA
 {
+    BitUnion64(X86IntReg)
+        Bitfield<63,0> R;
+        SignedBitfield<63,0> SR;
+        Bitfield<31,0> E;
+        SignedBitfield<31,0> SE;
+        Bitfield<15,0> X;
+        SignedBitfield<15,0> SX;
+        Bitfield<15,8> H;
+        SignedBitfield<15,8> SH;
+        Bitfield<7, 0> L;
+        SignedBitfield<7, 0> SL;
+    EndBitUnion(X86IntReg)
+
     enum IntRegIndex
     {
         INTREG_RAX,
@@ -148,6 +166,36 @@ namespace X86ISA
 
         NUM_INTREGS
     };
+
+    // This needs to be large enough to miss all the other bits of an index.
+    static const IntRegIndex IntFoldBit = (IntRegIndex)(1 << 6);
+
+    inline static IntRegIndex
+    INTREG_MICRO(int index)
+    {
+        return (IntRegIndex)(NUM_INTREGS + index);
+    }
+
+    inline static IntRegIndex
+    INTREG_PSEUDO(int index)
+    {
+        return (IntRegIndex)(NUM_INTREGS + NumMicroIntRegs + index);
+    }
+
+    inline static IntRegIndex
+    INTREG_IMPLICIT(int index)
+    {
+        return (IntRegIndex)(NUM_INTREGS + NumMicroIntRegs +
+                             NumPseudoIntRegs + index);
+    }
+
+    inline static IntRegIndex
+    INTREG_FOLDED(int index, int foldBit)
+    {
+        if ((index & 0x1C) == 4 && foldBit)
+            index = (index - 4) | foldBit;
+        return (IntRegIndex)index;
+    }
 };
 
 #endif // __ARCH_X86_INTREGS_HH__