0x03: lsl_Gv_Ew();
//sandpile.org doesn't seem to know what this is... ?
0x04: loadall_or_reset_or_hang();
+#if FULL_SYSTEM
0x05: syscall();
+#else
+ 0x05: SyscallInst::syscall('xc->syscall(rax)');
+#endif
0x06: clts();
//sandpile.org says (AMD) after sysret, so I might want to check
//if that means amd64 or AMD machines
0x07: loadall_or_sysret();
}
0x01: decode OPCODE_OP_BOTTOM3 {
- 0x0: holderholder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
- }
- 0x02: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ 0x0: invd();
+ 0x1: wbinvd();
+ 0x2: Inst::UD2();
+ 0x3: Inst::UD2();
+ 0x4: Inst::UD2();
+ 0x5: threednow();
+ 0x6: threednow();
+ 0x7: threednow();
+ }
+ 0x02: decode LEGACY_DECODEVAL {
+ // no prefix
+ 0x0: decode OPCODE_OP_BOTTOM3 {
+ 0x0: holder();
+ 0x1: holder();
+ 0x2: holder();
+ 0x3: holder();
+ 0x4: holder();
+ 0x5: holder();
+ 0x6: holder();
+ 0x7: holder();
+ }
+ // repe (0xF3)
+ 0x4: decode OPCODE_OP_BOTTOM3 {
+ 0x0: holder();
+ 0x1: holder();
+ 0x2: holder();
+ 0x3: holder();
+ 0x4: holder();
+ 0x5: holder();
+ 0x6: holder();
+ 0x7: holder();
+ }
+ // operand size (0x66)
+ 0x1: decode OPCODE_OP_BOTTOM3 {
+ 0x0: holder();
+ 0x1: holder();
+ 0x2: holder();
+ 0x3: holder();
+ 0x4: holder();
+ 0x5: holder();
+ 0x6: holder();
+ 0x7: holder();
+ }
+ // repne (0xF2)
+ 0x8: decode OPCODE_OP_BOTTOM3 {
+ 0x0: holder();
+ 0x1: holder();
+ 0x2: holder();
+ 0x3: holder();
+ 0x4: holder();
+ 0x5: holder();
+ 0x6: holder();
+ 0x7: holder();
+ }
+ default: Inst::UD2();
}
0x03: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ 0x0: group17();
+ 0x1: group17();
+ 0x2: group17();
+ 0x3: group17();
+ 0x4: group17();
+ 0x5: group17();
+ 0x6: group17();
+ 0x7: group17();
}
0x04: decode OPCODE_OP_BOTTOM3 {
0x0: holder();
0x7: holder();
}
0x06: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ 0x0: wrmsr();
+ 0x1: rdtsc();
+ 0x2: rdmsr();
+ 0x3: rdpmc();
+ 0x4: sysenter();
+ 0x5: sysexit();
+ 0x6: Inst::UD2();
+ 0x7: getsec();
}
0x07: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
- }
- 0x08: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
- }
- 0x09: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ 0x0: three_byte_opcode();
+ 0x1: three_byte_opcode();
+ 0x2: three_byte_opcode();
+ 0x3: three_byte_opcode();
+ 0x4: three_byte_opcode();
+ 0x5: three_byte_opcode();
+ 0x6: three_byte_opcode();
+ 0x7: three_byte_opcode();
+ }
+ format Inst {
+ 0x08: decode OPCODE_OP_BOTTOM3 {
+ 0x0: CMOVO(Gv,Ev);
+ 0x1: CMOVNO(Gv,Ev);
+ 0x2: CMOVB(Gv,Ev);
+ 0x3: CMOVNB(Gv,Ev);
+ 0x4: CMOVZ(Gv,Ev);
+ 0x5: CMOVNZ(Gv,Ev);
+ 0x6: CMOVBE(Gv,Ev);
+ 0x7: CMOVNBE(Gv,Ev);
+ }
+ 0x09: decode OPCODE_OP_BOTTOM3 {
+ 0x0: CMOVS(Gv,Ev);
+ 0x1: CMOVNS(Gv,Ev);
+ 0x2: CMOVP(Gv,Ev);
+ 0x3: CMOVNP(Gv,Ev);
+ 0x4: CMOVL(Gv,Ev);
+ 0x5: CMOVNL(Gv,Ev);
+ 0x6: CMOVLE(Gv,Ev);
+ 0x7: CMOVNLE(Gv,Ev);
+ }
}
0x0A: decode OPCODE_OP_BOTTOM3 {
0x0: holder();
0x6: holder();
0x7: holder();
}
- 0x10: decode OPCODE_OP_BOTTOM3 {
- 0x0: jo_Jz();
- 0x1: jno_Jz();
- 0x2: jb_Jz();
- 0x3: jnb_Jz();
- 0x4: jz_Jz();
- 0x5: Inst::JNZ(Jz);
- 0x6: jbe_Jz();
- 0x7: jnbe_Jz();
- }
- 0x11: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
- }
- 0x12: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
- }
- 0x13: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ format Inst {
+ 0x10: decode OPCODE_OP_BOTTOM3 {
+ 0x0: JO(Jz);
+ 0x1: JNO(Jz);
+ 0x2: JB(Jz);
+ 0x3: JNB(Jz);
+ 0x4: JZ(Jz);
+ 0x5: JNZ(Jz);
+ 0x6: JBE(Jz);
+ 0x7: JNBE(Jz);
+ }
+ 0x11: decode OPCODE_OP_BOTTOM3 {
+ 0x0: JS(Jz);
+ 0x1: JNS(Jz);
+ 0x2: JP(Jz);
+ 0x3: JNP(Jz);
+ 0x4: JL(Jz);
+ 0x5: JNL(Jz);
+ 0x6: JLE(Jz);
+ 0x7: JNLE(Jz);
+ }
+ 0x12: decode OPCODE_OP_BOTTOM3 {
+ 0x0: SETO(Eb);
+ 0x1: SETNO(Eb);
+ 0x2: SETB(Eb);
+ 0x3: SETNB(Eb);
+ 0x4: SETZ(Eb);
+ 0x5: SETNZ(Eb);
+ 0x6: SETBE(Eb);
+ 0x7: SETNBE(Eb);
+ }
+ 0x13: decode OPCODE_OP_BOTTOM3 {
+ 0x0: SETS(Eb);
+ 0x1: SETNS(Eb);
+ 0x2: SETP(Eb);
+ 0x3: SETNP(Eb);
+ 0x4: SETL(Eb);
+ 0x5: SETNL(Eb);
+ 0x6: SETLE(Eb);
+ 0x7: SETNLE(Eb);
+ }
}
0x14: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ 0x0: push_fs();
+ 0x1: pop_fs();
+ 0x2: cpuid();
+ 0x3: bt_Ev_Gv();
+ 0x4: shld_Ev_Gv_Ib();
+ 0x5: shld_Ev_Gv_rCl();
+ 0x6: xbts_and_cmpxchg();
+ 0x7: ibts_and_cmpxchg();
}
0x15: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ 0x0: push_gs();
+ 0x1: pop_gs();
+ 0x2: rsm_smm();
+ 0x3: bts_Ev_Gv();
+ 0x4: shrd_Ev_Gv_Ib();
+ 0x5: shrd_Ev_Gv_rCl();
+ 0x6: group16();
+ 0x7: Inst::IMUL(Gv,Ev);
}
0x16: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ 0x0: cmpxchg_Eb_Gb();
+ 0x1: cmpxchg_Ev_Gv();
+ 0x2: lss_Gz_Mp();
+ 0x3: btr_Ev_Gv();
+ 0x4: lfs_Gz_Mp();
+ 0x5: lgs_Gz_Mp();
+ //The size of the second operand in these instructions should
+ //really be "b" or "w", but it's set to v in order to have a
+ //consistent register size. This shouldn't affect behavior.
+ 0x6: Inst::MOVZX_B(Gv,Ev);
+ 0x7: Inst::MOVZX_W(Gv,Ev);
}
0x17: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
+ 0x0: jmpe_Jz(); // IA-64?
+ 0x1: group11_UD2();
+ 0x2: group8_Ev_Ib();
+ 0x3: btc_Ev_Gv();
+ 0x4: bsf_Gv_Ev();
+ 0x5: bsr_Gv_Ev();
+ //The size of the second operand in these instructions should
+ //really be "b" or "w", but it's set to v in order to have a
+ //consistent register size. This shouldn't affect behavior.
+ 0x6: Inst::MOVSX_B(Gv,Ev);
+ 0x7: Inst::MOVSX_W(Gv,Ev);
}
0x18: decode OPCODE_OP_BOTTOM3 {
0x0: holder();
0x6: holder();
0x7: holder();
}
- 0x19: decode OPCODE_OP_BOTTOM3 {
- 0x0: holder();
- 0x1: holder();
- 0x2: holder();
- 0x3: holder();
- 0x4: holder();
- 0x5: holder();
- 0x6: holder();
- 0x7: holder();
- }
+ 0x19: bswap_B();
0x1A: decode OPCODE_OP_BOTTOM3 {
0x0: holder();
0x1: holder();
projects / gem5.git / blobdiff