mem-cache: Add multiple eviction stats

[gem5.git] / src / arch / x86 / isa.hh

diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index b61face0950eea7763b4d203bda24ab98b0b95c3..a835a794a5b21ae94cfb72b2751d997e8f6dc456 100644 (file)
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -51,7 +51,7 @@ namespace X86ISA
     class ISA : public SimObject
     {
       protected:
-        MiscReg regVal[NUM_MISCREGS];
+        RegVal regVal[NUM_MISCREGS];
         void updateHandyM5Reg(Efer efer, CR0 cr0,
                 SegAttr csAttr, SegAttr ssAttr, RFLAGS rflags,
                 ThreadContext *tc);
@@ -64,11 +64,11 @@ namespace X86ISA
         ISA(Params *p);
         const Params *params() const;
 
-        MiscReg readMiscRegNoEffect(int miscReg) const;
-        MiscReg readMiscReg(int miscReg, ThreadContext *tc);
+        RegVal readMiscRegNoEffect(int miscReg) const;
+        RegVal readMiscReg(int miscReg, ThreadContext *tc);
 
-        void setMiscRegNoEffect(int miscReg, MiscReg val);
-        void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc);
+        void setMiscRegNoEffect(int miscReg, RegVal val);
+        void setMiscReg(int miscReg, RegVal val, ThreadContext *tc);
 
         RegId
         flattenRegId(const RegId& regId) const
@@ -116,6 +116,12 @@ namespace X86ISA
             return reg;
         }
 
+        int
+        flattenVecPredIndex(int reg) const
+        {
+            return reg;
+        }
+
         int
         flattenCCIndex(int reg) const
         {