#include "arch/x86/types.hh"
#include "arch/x86/x86_traits.hh"
+#include "base/compiler.hh"
#include "base/types.hh"
namespace LittleEndianGuest {}
//are used.
using namespace LittleEndianGuest;
- // X86 does not have a delay slot
-#define ISA_HAS_DELAY_SLOT 0
-
- // X86 NOP (XCHG rAX, rAX)
- //XXX This needs to be set to an intermediate instruction struct
- //which encodes this instruction
-
- //4k. This value is not constant on x86.
- const int LogVMPageSize = 12;
- const int VMPageSize = (1 << LogVMPageSize);
-
- const int PageShift = 12;
- const int PageBytes = 1ULL << PageShift;
-
- const int BranchPredAddrShiftAmt = 0;
+ const Addr PageShift = 12;
+ const Addr PageBytes = ULL(1) << PageShift;
// Memory accesses can be unaligned
const bool HasUnalignedMemAcc = true;
- const ExtMachInst NoopMachInst = {
- 0x0, // No legacy prefixes.
- 0x0, // No rex prefix.
- { 1, 0x0, 0x0, 0x90 }, // One opcode byte, 0x90.
- 0x0, 0x0, // No modrm or sib.
- 0, 0, // No immediate or displacement.
- 8, 8, 8, // All sizes are 8.
- 0, // Displacement size is 0.
- SixtyFourBitMode // Behave as if we're in 64 bit
- // mode (this doesn't actually matter).
- };
+ const bool CurThreadInfoImplemented = false;
+ const int CurThreadInfoReg = -1;
}
#endif // __ARCH_X86_ISATRAITS_HH__