* Copyright (c) 2007 The Hewlett-Packard Development Company
* All rights reserved.
*
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- * following conditions are met:
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
*
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
#include "arch/x86/types.hh"
#include "arch/x86/x86_traits.hh"
-
-class StaticInstPtr;
+#include "base/compiler.hh"
+#include "base/types.hh"
namespace LittleEndianGuest {}
//are used.
using namespace LittleEndianGuest;
- // X86 does not have a delay slot
-#define ISA_HAS_DELAY_SLOT 0
-
- // X86 NOP (XCHG rAX, rAX)
- //XXX This needs to be set to an intermediate instruction struct
- //which encodes this instruction
-
- // These enumerate all the registers for dependence tracking.
- enum DependenceTags {
- //The number of microcode registers needs to be added to this
- FP_Base_DepTag = 16,
- Ctrl_Base_DepTag =
- FP_Base_DepTag +
- //mmx/x87 registers
- 8 +
- //xmm registers
- 16
- };
-
- // semantically meaningful register indices
- //There is no such register in X86
- const int ZeroReg = 0;
- const int StackPointerReg = 4; //RSP
- //X86 doesn't seem to have a link register
- const int ReturnAddressReg = 0;
- const int ReturnValueReg = 0; //RAX
- const int FramePointerReg = 5; //RBP
- const int ArgumentReg0 = 7; //RDI
- const int ArgumentReg1 = 6; //RSI
- const int ArgumentReg2 = 2; //RDX
- const int ArgumentReg3 = 1; //RCX
- const int ArgumentReg4 = 8; //R8W
- const int ArgumentReg5 = 9; //R9W
-
- // Some OS syscalls use a second register (rdx) to return a second
- // value
- const int SyscallPseudoReturnReg = 2; //RDX
-
- //XXX These numbers are bogus
- const int MaxInstSrcRegs = 10;
- const int MaxInstDestRegs = 10;
-
- //4k. This value is not constant on x86.
- const int LogVMPageSize = 12;
- const int VMPageSize = (1 << LogVMPageSize);
-
- const int PageShift = 13;
- const int PageBytes = 1ULL << PageShift;
+ const Addr PageShift = 12;
+ const Addr PageBytes = ULL(1) << PageShift;
- const int BranchPredAddrShiftAmt = 0;
+ // Memory accesses can be unaligned
+ const bool HasUnalignedMemAcc = true;
- StaticInstPtr decodeInst(ExtMachInst);
-};
+ const bool CurThreadInfoImplemented = false;
+ const int CurThreadInfoReg = -1;
+}
#endif // __ARCH_X86_ISATRAITS_HH__
projects / gem5.git / blobdiff