arch-arm: Add initial support for SVE contiguous loads/stores

[gem5.git] / src / arch / x86 / nativetrace.cc

diff --git a/src/arch/x86/nativetrace.cc b/src/arch/x86/nativetrace.cc
index 3dd5890bc79fb100e5019b7afff84ef0d03ee3ad..142a51cd76299c45b9f59aa917774d930fe9341e 100644 (file)
--- a/src/arch/x86/nativetrace.cc
+++ b/src/arch/x86/nativetrace.cc
@@ -28,11 +28,13 @@
  * Authors: Gabe Black
  */
 
+#include "arch/x86/nativetrace.hh"
+
+#include "arch/x86/isa_traits.hh"
 #include "arch/x86/regs/float.hh"
 #include "arch/x86/regs/int.hh"
-#include "arch/x86/isa_traits.hh"
-#include "arch/x86/nativetrace.hh"
 #include "cpu/thread_context.hh"
+#include "debug/ExecRegDelta.hh"
 #include "params/X86NativeTrace.hh"
 #include "sim/byteswap.hh"
 
@@ -88,9 +90,9 @@ X86NativeTrace::ThreadState::update(ThreadContext *tc)
     rip = tc->pcState().npc();
     //This should be expanded if x87 registers are considered
     for (int i = 0; i < 8; i++)
-        mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i));
+        mmx[i] = tc->readFloatReg(X86ISA::FLOATREG_MMX(i));
     for (int i = 0; i < 32; i++)
-        xmm[i] = tc->readFloatRegBits(X86ISA::FLOATREG_XMM_BASE + i);
+        xmm[i] = tc->readFloatReg(X86ISA::FLOATREG_XMM_BASE + i);
 }
 
 
@@ -104,9 +106,9 @@ X86NativeTrace::X86NativeTrace(const Params *p)
 bool
 X86NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
 {
-    if(!checkRcx)
+    if (!checkRcx)
         checkRcx = (mVal != oldRcxVal || nVal != oldRealRcxVal);
-    if(checkRcx)
+    if (checkRcx)
         return checkReg(name, mVal, nVal);
     return true;
 }
@@ -114,9 +116,9 @@ X86NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
 bool
 X86NativeTrace::checkR11Reg(const char * name, uint64_t &mVal, uint64_t &nVal)
 {
-    if(!checkR11)
+    if (!checkR11)
         checkR11 = (mVal != oldR11Val || nVal != oldRealR11Val);
-    if(checkR11)
+    if (checkR11)
         return checkReg(name, mVal, nVal);
     return true;
 }
@@ -141,7 +143,7 @@ X86NativeTrace::check(NativeTraceRecord *record)
     nState.update(this);
     mState.update(record->getThread());
 
-    if(record->getStaticInst()->isSyscall())
+    if (record->getStaticInst()->isSyscall())
     {
         checkRcx = false;
         checkR11 = false;
@@ -196,4 +198,4 @@ Trace::X86NativeTrace *
 X86NativeTraceParams::create()
 {
     return new Trace::X86NativeTrace(this);
-};
+}